]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/highbank.h
mpc52xx: remove o2dnt board
[people/ms/u-boot.git] / include / configs / highbank.h
CommitLineData
37fc0ed2
RH
1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
7 * any later version.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21#define CONFIG_L2_OFF
22
23#define CONFIG_SYS_NO_FLASH
24#define CFG_HZ 1000
25#define CONFIG_SYS_HZ CFG_HZ
26
27#define CONFIG_OF_LIBFDT
28#define CONFIG_FIT
29#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
30
31/*
32 * Size of malloc() pool
33 */
34#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
35
36#define CONFIG_PL011_SERIAL
37#define CONFIG_PL011_CLOCK 150000000
38#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
39#define CONFIG_CONS_INDEX 0
40
41#define CONFIG_BAUDRATE 38400
37fc0ed2 42
877012df
RH
43#define CONFIG_BOOTCOUNT_LIMIT
44#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
45
37fc0ed2
RH
46#define CONFIG_MISC_INIT_R
47#define CONFIG_SCSI_AHCI
48#define CONFIG_SCSI_AHCI_PLAT
49#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
50#define CONFIG_SYS_SCSI_MAX_LUN 1
51#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
52 CONFIG_SYS_SCSI_MAX_LUN)
53
54#define CONFIG_DOS_PARTITION
55
9a420986
RH
56#define CONFIG_CALXEDA_XGMAC
57
58/* PXE support */
59#define CONFIG_BOOTP_PXE
60#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
61#define CONFIG_BOOTP_VCI_STRING "U-boot.armv7.highbank"
62
37fc0ed2
RH
63/*
64 * Command line configuration.
65 */
66#include <config_cmd_default.h>
37fc0ed2
RH
67
68#define CONFIG_CMD_BDI
9a420986 69#define CONFIG_CMD_DHCP
37fc0ed2
RH
70#define CONFIG_CMD_ELF
71#define CONFIG_CMD_MEMORY
72#define CONFIG_CMD_LOADS
73#define CONFIG_CMD_SCSI
74#define CONFIG_CMD_EXT2
9a420986
RH
75#define CONFIG_CMD_PXE
76#define CONFIG_MENU
37fc0ed2
RH
77
78#define CONFIG_BOOTDELAY 2
79/*
80 * Miscellaneous configurable options
81 */
82#define CONFIG_CMDLINE_EDITING
83#define CONFIG_AUTO_COMPLETE
84#define CONFIG_SYS_LONGHELP /* undef to save memory */
85#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
86#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
87#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
88#define CONFIG_SYS_PROMPT "Highbank #"
89/* Print Buffer Size */
90#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
91 sizeof(CONFIG_SYS_PROMPT)+16)
92
93#define CONFIG_SYS_LOAD_ADDR 0x800000
94
95/*-----------------------------------------------------------------------
96 * Stack sizes
97 *
98 * The stack sizes are set up in start.S using the settings below
99 */
100#define CONFIG_STACKSIZE (128*1024) /* regular stack */
101#ifdef CONFIG_USE_IRQ
102#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
103#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
104#endif
105
106/*-----------------------------------------------------------------------
107 * Physical Memory Map
108 */
109#define CONFIG_NR_DRAM_BANKS 1
110#define PHYS_SDRAM_1_SIZE (4089 << 20)
111#define CONFIG_SYS_MEMTEST_START 0x100000
112#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
113
a34e8549
JH
114/* Environment data setup
115*/
116#define CONFIG_ENV_IS_IN_NVRAM
117#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
118#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
119#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
120#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
37fc0ed2
RH
121
122#define CONFIG_SYS_SDRAM_BASE 0x00000000
7b81649a 123#define CONFIG_SYS_TEXT_BASE 0x00008000
37fc0ed2
RH
124#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
125#define CONFIG_SKIP_LOWLEVEL_INIT
126
127#endif