]>
Commit | Line | Data |
---|---|---|
5ad86216 SH |
1 | /* |
2 | * (C) Copyright 2004 | |
3 | * Texas Instruments. | |
4 | * Richard Woodruff <r-woodruff2@ti.com> | |
5 | * Kshitij Gupta <kshitij@ti.com> | |
6 | * | |
7064122c | 7 | * Configuration settings for the phyCORE-i.MX31 board. |
5ad86216 | 8 | * |
3765b3e7 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
5ad86216 SH |
10 | */ |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
953ee4d0 FE |
15 | #include <asm/arch/imx-regs.h> |
16 | ||
6ac1c903 | 17 | /* High Level Configuration Options */ |
3fd968e9 | 18 | #define CONFIG_MX31 /* This is a mx31 */ |
5ad86216 SH |
19 | #define CONFIG_MX31_CLK32 32000 |
20 | ||
6ac1c903 AG |
21 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
22 | #define CONFIG_SETUP_MEMORY_TAGS | |
23 | #define CONFIG_INITRD_TAG | |
5ad86216 SH |
24 | |
25 | /* | |
26 | * Size of malloc() pool | |
27 | */ | |
62a22dca | 28 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 512 * 1024) |
5ad86216 SH |
29 | |
30 | /* | |
31 | * Hardware drivers | |
32 | */ | |
33 | ||
b089d039 | 34 | #define CONFIG_SYS_I2C |
35 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
36 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
37 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 38 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
de6f604d | 39 | #define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET |
5ad86216 | 40 | |
6ac1c903 | 41 | #define CONFIG_MXC_UART |
40f6fffe | 42 | #define CONFIG_MXC_UART_BASE UART1_BASE |
5ad86216 SH |
43 | |
44 | /* allow to overwrite serial and ethaddr */ | |
45 | #define CONFIG_ENV_OVERWRITE | |
46 | #define CONFIG_CONS_INDEX 1 | |
5ad86216 SH |
47 | |
48 | /*********************************************************** | |
49 | * Command definition | |
50 | ***********************************************************/ | |
5ad86216 | 51 | |
5ad86216 SH |
52 | #define CONFIG_NETMASK 255.255.255.0 |
53 | #define CONFIG_IPADDR 192.168.23.168 | |
54 | #define CONFIG_SERVERIP 192.168.23.2 | |
55 | ||
6ac1c903 AG |
56 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
57 | "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ | |
58 | "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ | |
59 | "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ | |
60 | "bootargs_flash=setenv bootargs $(bootargs) " \ | |
61 | "root=/dev/mtdblock2 rootfstype=jffs2\0" \ | |
62 | "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \ | |
63 | "bootcmd=run bootcmd_net\0" \ | |
64 | "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \ | |
65 | "tftpboot 0x80000000 $(uimage);bootm\0" \ | |
66 | "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \ | |
67 | "bootm 0x80000000\0" \ | |
68 | "unlock=yes\0" \ | |
43ede0bc | 69 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
6ac1c903 AG |
70 | "prg_uboot=tftpboot 0x80000000 $(uboot);" \ |
71 | "protect off 0xa0000000 +0x20000;" \ | |
72 | "erase 0xa0000000 +0x20000;" \ | |
73 | "cp.b 0x80000000 0xa0000000 $(filesize)\0" \ | |
74 | "prg_kernel=tftpboot 0x80000000 $(uimage);" \ | |
75 | "erase 0xa0040000 +0x180000;" \ | |
76 | "cp.b 0x80000000 0xa0040000 $(filesize)\0" \ | |
77 | "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \ | |
78 | "erase 0xa01c0000 0xa1ffffff;" \ | |
79 | "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \ | |
80 | "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \ | |
81 | "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \ | |
82 | "sync:1241513985,vmode:0\0" | |
83 | ||
5ad86216 SH |
84 | /* |
85 | * Miscellaneous configurable options | |
86 | */ | |
5ad86216 | 87 | |
6d0f6bcf JCPV |
88 | #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ |
89 | #define CONFIG_SYS_MEMTEST_END 0x10000 | |
5ad86216 | 90 | |
6d0f6bcf | 91 | #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ |
5ad86216 | 92 | |
6ac1c903 | 93 | /* |
5ad86216 SH |
94 | * Physical Memory Map |
95 | */ | |
6ac1c903 AG |
96 | #define CONFIG_NR_DRAM_BANKS 1 |
97 | #define PHYS_SDRAM_1 0x80000000 | |
98 | #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) | |
953ee4d0 FE |
99 | |
100 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
101 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
102 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
103 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
104 | GENERATED_GBL_DATA_SIZE) | |
105 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
106 | CONFIG_SYS_GBL_DATA_OFFSET) | |
5ad86216 | 107 | |
6ac1c903 | 108 | /* |
5ad86216 SH |
109 | * FLASH and environment organization |
110 | */ | |
6d0f6bcf | 111 | #define CONFIG_SYS_FLASH_BASE 0xa0000000 |
6ac1c903 AG |
112 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */ |
113 | #define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */ | |
114 | /* Monitor at beginning of flash */ | |
115 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
116 | ||
6ac1c903 AG |
117 | #define CONFIG_ENV_OFFSET 0x00 /* env. starts here */ |
118 | #define CONFIG_ENV_SIZE 4096 | |
6d0f6bcf | 119 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52 |
6ac1c903 AG |
120 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */ |
121 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */ | |
122 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */ | |
5ad86216 | 123 | |
6ac1c903 | 124 | /* |
5ad86216 SH |
125 | * CFI FLASH driver setup |
126 | */ | |
6ac1c903 AG |
127 | #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ |
128 | #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */ | |
129 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */ | |
130 | #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ | |
5ad86216 | 131 | |
6ac1c903 AG |
132 | /* |
133 | * Timeout for Flash Erase and Flash Write | |
134 | * timeout values are in ticks | |
135 | */ | |
136 | #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) | |
137 | #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) | |
5ad86216 SH |
138 | |
139 | /* | |
140 | * JFFS2 partitions | |
141 | */ | |
5ad86216 SH |
142 | #define CONFIG_JFFS2_DEV "nor0" |
143 | ||
a2bb7105 | 144 | /* EET platform additions */ |
f428268a | 145 | #ifdef CONFIG_TARGET_IMX31_PHYCORE_EET |
6ac1c903 | 146 | #define CONFIG_HARD_SPI |
a2bb7105 | 147 | |
6ac1c903 | 148 | #define CONFIG_S6E63D6 |
a2bb7105 | 149 | |
62a22dca HR |
150 | #define CONFIG_VIDEO_MX3 |
151 | #define CONFIG_VIDEO_LOGO | |
62a22dca | 152 | #define CONFIG_SPLASH_SCREEN |
62a22dca | 153 | #define CONFIG_BMP_16BPP |
a2bb7105 GL |
154 | #endif |
155 | ||
5ad86216 | 156 | #endif /* __CONFIG_H */ |