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f4b7532f JT |
1 | /* |
2 | * Copyright (C) 2016 Amarula Solutions B.V. | |
3 | * Copyright (C) 2016 Engicam S.r.l. | |
4 | * | |
5 | * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits. | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef __IMX6QLD_ICORE_CONFIG_H | |
11 | #define __IMX6QLD_ICORE_CONFIG_H | |
12 | ||
13 | #include <linux/sizes.h> | |
14 | #include "mx6_common.h" | |
15 | ||
16 | /* Size of malloc() pool */ | |
17 | #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) | |
18 | ||
19 | /* Total Size of Environment Sector */ | |
20 | #define CONFIG_ENV_SIZE SZ_128K | |
21 | ||
22 | /* Allow to overwrite serial and ethaddr */ | |
23 | #define CONFIG_ENV_OVERWRITE | |
24 | ||
25 | /* Environment */ | |
26 | #ifndef CONFIG_ENV_IS_NOWHERE | |
27 | /* Environment in MMC */ | |
28 | # if defined(CONFIG_ENV_IS_IN_MMC) | |
29 | # define CONFIG_ENV_OFFSET 0x100000 | |
023ff2f7 JT |
30 | /* Environment in NAND */ |
31 | # elif defined(CONFIG_ENV_IS_IN_NAND) | |
32 | # define CONFIG_ENV_OFFSET 0x400000 | |
33 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
f4b7532f JT |
34 | # endif |
35 | #endif | |
36 | ||
37 | /* Default environment */ | |
38 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
39 | "script=boot.scr\0" \ | |
3713571c | 40 | "splashpos=m,m\0" \ |
bfd96402 | 41 | "image=uImage\0" \ |
66d1d687 | 42 | "fit_image=fit.itb\0" \ |
f4b7532f JT |
43 | "console=ttymxc3\0" \ |
44 | "fdt_high=0xffffffff\0" \ | |
f4b7532f JT |
45 | "fdt_addr=0x18000000\0" \ |
46 | "boot_fdt=try\0" \ | |
f4b7532f | 47 | "mmcpart=1\0" \ |
ddd90660 | 48 | "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ |
f4b7532f JT |
49 | "mmcautodetect=yes\0" \ |
50 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
51 | "root=${mmcroot}\0" \ | |
ddd90660 JT |
52 | "ubiargs=setenv bootargs console=${console},${baudrate} " \ |
53 | "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ | |
f4b7532f JT |
54 | "loadbootscript=" \ |
55 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
56 | "bootscript=echo Running bootscript from mmc ...; " \ | |
57 | "source\0" \ | |
58 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
59 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
66d1d687 JT |
60 | "loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \ |
61 | "fitboot=echo Booting FIT image from mmc ...; " \ | |
62 | "run mmcargs; " \ | |
63 | "bootm ${loadaddr}\0" \ | |
98f56610 | 64 | "_mmcboot=run mmcargs; " \ |
f4b7532f JT |
65 | "run mmcargs; " \ |
66 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
67 | "if run loadfdt; then " \ | |
bfd96402 | 68 | "bootm ${loadaddr} - ${fdt_addr}; " \ |
f4b7532f JT |
69 | "else " \ |
70 | "if test ${boot_fdt} = try; then " \ | |
bfd96402 | 71 | "bootm; " \ |
f4b7532f JT |
72 | "else " \ |
73 | "echo WARN: Cannot load the DT; " \ | |
74 | "fi; " \ | |
75 | "fi; " \ | |
76 | "else " \ | |
bfd96402 | 77 | "bootm; " \ |
ddd90660 | 78 | "fi\0" \ |
98f56610 JT |
79 | "mmcboot=echo Booting from mmc ...; " \ |
80 | "if mmc rescan; then " \ | |
81 | "if run loadbootscript; then " \ | |
82 | "run bootscript; " \ | |
83 | "else " \ | |
84 | "if run loadfit; then " \ | |
85 | "run fitboot; " \ | |
86 | "else " \ | |
87 | "if run loadimage; then " \ | |
88 | "run _mmcboot; " \ | |
89 | "fi; " \ | |
90 | "fi; " \ | |
91 | "fi; " \ | |
92 | "fi\0" \ | |
ddd90660 JT |
93 | "nandboot=echo Booting from nand ...; " \ |
94 | "if mtdparts; then " \ | |
95 | "echo Starting nand boot ...; " \ | |
96 | "else " \ | |
97 | "mtdparts default; " \ | |
98 | "fi; " \ | |
99 | "run ubiargs; " \ | |
100 | "nand read ${loadaddr} kernel 0x800000; " \ | |
101 | "nand read ${fdt_addr} dtb 0x100000; " \ | |
102 | "bootm ${loadaddr} - ${fdt_addr}\0" | |
f4b7532f | 103 | |
98f56610 | 104 | #define CONFIG_BOOTCOMMAND "run $modeboot" |
f4b7532f JT |
105 | |
106 | /* Miscellaneous configurable options */ | |
107 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
108 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) | |
109 | ||
110 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
111 | #define CONFIG_SYS_HZ 1000 | |
112 | ||
113 | /* Physical Memory Map */ | |
114 | #define CONFIG_NR_DRAM_BANKS 1 | |
115 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
116 | ||
117 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
118 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
119 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
120 | ||
121 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
122 | GENERATED_GBL_DATA_SIZE) | |
123 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
124 | CONFIG_SYS_INIT_SP_OFFSET) | |
125 | ||
ada832f8 JT |
126 | /* FIT */ |
127 | #ifdef CONFIG_FIT | |
128 | # define CONFIG_HASH_VERIFY | |
129 | # define CONFIG_SHA1 | |
130 | # define CONFIG_SHA256 | |
8098b8cb | 131 | # define CONFIG_IMAGE_FORMAT_LEGACY |
ada832f8 JT |
132 | #endif |
133 | ||
f4b7532f JT |
134 | /* UART */ |
135 | #ifdef CONFIG_MXC_UART | |
136 | # define CONFIG_MXC_UART_BASE UART4_BASE | |
137 | #endif | |
138 | ||
139 | /* MMC */ | |
140 | #ifdef CONFIG_FSL_USDHC | |
141 | # define CONFIG_SYS_MMC_ENV_DEV 0 | |
142 | # define CONFIG_SYS_FSL_USDHC_NUM 1 | |
85392ded | 143 | # define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
f4b7532f JT |
144 | #endif |
145 | ||
023ff2f7 JT |
146 | /* NAND */ |
147 | #ifdef CONFIG_NAND_MXS | |
148 | # define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
149 | # define CONFIG_SYS_NAND_BASE 0x40000000 | |
150 | # define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
151 | # define CONFIG_SYS_NAND_ONFI_DETECTION | |
152 | # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
153 | # define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 | |
154 | ||
310db71d JT |
155 | /* MTD device */ |
156 | # define CONFIG_MTD_DEVICE | |
157 | # define CONFIG_CMD_MTDPARTS | |
158 | # define CONFIG_MTD_PARTITIONS | |
83425771 JT |
159 | # define MTDIDS_DEFAULT "nand0=gpmi-nand" |
160 | # define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ | |
08d7985b | 161 | "1m(env),8m(kernel),1m(dtb),-(rootfs)" |
310db71d | 162 | |
8a9c775a JT |
163 | /* UBI */ |
164 | # define CONFIG_CMD_UBIFS | |
165 | # define CONFIG_RBTREE | |
166 | # define CONFIG_LZO | |
167 | ||
023ff2f7 JT |
168 | # define CONFIG_APBH_DMA |
169 | # define CONFIG_APBH_DMA_BURST | |
170 | # define CONFIG_APBH_DMA_BURST8 | |
171 | #endif | |
172 | ||
58413366 JT |
173 | /* Ethernet */ |
174 | #ifdef CONFIG_FEC_MXC | |
175 | # define IMX_FEC_BASE ENET_BASE_ADDR | |
176 | # define CONFIG_FEC_MXC_PHYADDR 0 | |
177 | # define CONFIG_FEC_XCV_TYPE RMII | |
178 | # define CONFIG_ETHPRIME "FEC" | |
179 | ||
180 | # define CONFIG_MII | |
181 | # define CONFIG_PHYLIB | |
182 | # define CONFIG_PHY_SMSC | |
183 | #endif | |
184 | ||
ca7463c9 JT |
185 | /* Framebuffer */ |
186 | #ifdef CONFIG_VIDEO_IPUV3 | |
187 | # define CONFIG_IPUV3_CLK 260000000 | |
188 | # define CONFIG_IMX_VIDEO_SKIP | |
189 | ||
190 | # define CONFIG_SPLASH_SCREEN | |
3713571c | 191 | # define CONFIG_SPLASH_SCREEN_ALIGN |
ca7463c9 JT |
192 | # define CONFIG_BMP_16BPP |
193 | # define CONFIG_VIDEO_BMP_RLE8 | |
194 | # define CONFIG_VIDEO_LOGO | |
195 | # define CONFIG_VIDEO_BMP_LOGO | |
196 | #endif | |
197 | ||
f4b7532f JT |
198 | /* SPL */ |
199 | #ifdef CONFIG_SPL | |
023ff2f7 JT |
200 | # ifdef CONFIG_NAND_MXS |
201 | # define CONFIG_SPL_NAND_SUPPORT | |
202 | # else | |
203 | # define CONFIG_SPL_MMC_SUPPORT | |
204 | # endif | |
205 | ||
f4b7532f | 206 | # include "imx6_spl.h" |
f160c5c8 JT |
207 | # ifdef CONFIG_SPL_BUILD |
208 | # undef CONFIG_DM_GPIO | |
209 | # undef CONFIG_DM_MMC | |
210 | # endif | |
f4b7532f JT |
211 | #endif |
212 | ||
213 | #endif /* __IMX6QLD_ICORE_CONFIG_H */ |