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f4b7532f JT |
1 | /* |
2 | * Copyright (C) 2016 Amarula Solutions B.V. | |
3 | * Copyright (C) 2016 Engicam S.r.l. | |
4 | * | |
5 | * Configuration settings for the Engicam i.CoreM6 QDL Starter Kits. | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef __IMX6QLD_ICORE_CONFIG_H | |
11 | #define __IMX6QLD_ICORE_CONFIG_H | |
12 | ||
13 | #include <linux/sizes.h> | |
14 | #include "mx6_common.h" | |
15 | ||
16 | /* Size of malloc() pool */ | |
17 | #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) | |
18 | ||
19 | /* Total Size of Environment Sector */ | |
20 | #define CONFIG_ENV_SIZE SZ_128K | |
21 | ||
22 | /* Allow to overwrite serial and ethaddr */ | |
23 | #define CONFIG_ENV_OVERWRITE | |
24 | ||
25 | /* Environment */ | |
26 | #ifndef CONFIG_ENV_IS_NOWHERE | |
27 | /* Environment in MMC */ | |
28 | # if defined(CONFIG_ENV_IS_IN_MMC) | |
29 | # define CONFIG_ENV_OFFSET 0x100000 | |
023ff2f7 JT |
30 | /* Environment in NAND */ |
31 | # elif defined(CONFIG_ENV_IS_IN_NAND) | |
32 | # define CONFIG_ENV_OFFSET 0x400000 | |
33 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
f4b7532f JT |
34 | # endif |
35 | #endif | |
36 | ||
37 | /* Default environment */ | |
38 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
39 | "script=boot.scr\0" \ | |
3713571c | 40 | "splashpos=m,m\0" \ |
bfd96402 | 41 | "image=uImage\0" \ |
f4b7532f JT |
42 | "console=ttymxc3\0" \ |
43 | "fdt_high=0xffffffff\0" \ | |
44 | "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ | |
45 | "fdt_addr=0x18000000\0" \ | |
46 | "boot_fdt=try\0" \ | |
47 | "mmcdev=0\0" \ | |
48 | "mmcpart=1\0" \ | |
49 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
ddd90660 | 50 | "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ |
f4b7532f JT |
51 | "mmcautodetect=yes\0" \ |
52 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
53 | "root=${mmcroot}\0" \ | |
ddd90660 JT |
54 | "ubiargs=setenv bootargs console=${console},${baudrate} " \ |
55 | "ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \ | |
f4b7532f JT |
56 | "loadbootscript=" \ |
57 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
58 | "bootscript=echo Running bootscript from mmc ...; " \ | |
59 | "source\0" \ | |
60 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
61 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
62 | "mmcboot=echo Booting from mmc ...; " \ | |
63 | "run mmcargs; " \ | |
64 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
65 | "if run loadfdt; then " \ | |
bfd96402 | 66 | "bootm ${loadaddr} - ${fdt_addr}; " \ |
f4b7532f JT |
67 | "else " \ |
68 | "if test ${boot_fdt} = try; then " \ | |
bfd96402 | 69 | "bootm; " \ |
f4b7532f JT |
70 | "else " \ |
71 | "echo WARN: Cannot load the DT; " \ | |
72 | "fi; " \ | |
73 | "fi; " \ | |
74 | "else " \ | |
bfd96402 | 75 | "bootm; " \ |
ddd90660 JT |
76 | "fi\0" \ |
77 | "nandboot=echo Booting from nand ...; " \ | |
78 | "if mtdparts; then " \ | |
79 | "echo Starting nand boot ...; " \ | |
80 | "else " \ | |
81 | "mtdparts default; " \ | |
82 | "fi; " \ | |
83 | "run ubiargs; " \ | |
84 | "nand read ${loadaddr} kernel 0x800000; " \ | |
85 | "nand read ${fdt_addr} dtb 0x100000; " \ | |
86 | "bootm ${loadaddr} - ${fdt_addr}\0" | |
f4b7532f | 87 | |
ddd90660 JT |
88 | #ifdef CONFIG_NAND_MXS |
89 | # define CONFIG_BOOTCOMMAND "run nandboot" | |
90 | #else | |
91 | # define CONFIG_BOOTCOMMAND \ | |
f4b7532f JT |
92 | "mmc dev ${mmcdev};" \ |
93 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
94 | "if run loadbootscript; then " \ | |
95 | "run bootscript; " \ | |
96 | "else " \ | |
97 | "if run loadimage; then " \ | |
98 | "run mmcboot; " \ | |
99 | "fi; " \ | |
100 | "fi; " \ | |
101 | "fi" | |
ddd90660 | 102 | #endif |
f4b7532f JT |
103 | |
104 | /* Miscellaneous configurable options */ | |
105 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
106 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) | |
107 | ||
108 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
109 | #define CONFIG_SYS_HZ 1000 | |
110 | ||
111 | /* Physical Memory Map */ | |
112 | #define CONFIG_NR_DRAM_BANKS 1 | |
113 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
114 | ||
115 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
116 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
117 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
118 | ||
119 | #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
120 | GENERATED_GBL_DATA_SIZE) | |
121 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
122 | CONFIG_SYS_INIT_SP_OFFSET) | |
123 | ||
124 | /* UART */ | |
125 | #ifdef CONFIG_MXC_UART | |
126 | # define CONFIG_MXC_UART_BASE UART4_BASE | |
127 | #endif | |
128 | ||
129 | /* MMC */ | |
130 | #ifdef CONFIG_FSL_USDHC | |
131 | # define CONFIG_SYS_MMC_ENV_DEV 0 | |
132 | # define CONFIG_SYS_FSL_USDHC_NUM 1 | |
133 | # define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR | |
134 | #endif | |
135 | ||
023ff2f7 JT |
136 | /* NAND */ |
137 | #ifdef CONFIG_NAND_MXS | |
138 | # define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
139 | # define CONFIG_SYS_NAND_BASE 0x40000000 | |
140 | # define CONFIG_SYS_NAND_5_ADDR_CYCLE | |
141 | # define CONFIG_SYS_NAND_ONFI_DETECTION | |
142 | # define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
143 | # define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000 | |
144 | ||
310db71d JT |
145 | /* MTD device */ |
146 | # define CONFIG_MTD_DEVICE | |
147 | # define CONFIG_CMD_MTDPARTS | |
148 | # define CONFIG_MTD_PARTITIONS | |
83425771 JT |
149 | # define MTDIDS_DEFAULT "nand0=gpmi-nand" |
150 | # define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:2m(spl),2m(uboot)," \ | |
08d7985b | 151 | "1m(env),8m(kernel),1m(dtb),-(rootfs)" |
310db71d | 152 | |
8a9c775a JT |
153 | /* UBI */ |
154 | # define CONFIG_CMD_UBIFS | |
155 | # define CONFIG_RBTREE | |
156 | # define CONFIG_LZO | |
157 | ||
023ff2f7 JT |
158 | # define CONFIG_APBH_DMA |
159 | # define CONFIG_APBH_DMA_BURST | |
160 | # define CONFIG_APBH_DMA_BURST8 | |
161 | #endif | |
162 | ||
58413366 JT |
163 | /* Ethernet */ |
164 | #ifdef CONFIG_FEC_MXC | |
165 | # define IMX_FEC_BASE ENET_BASE_ADDR | |
166 | # define CONFIG_FEC_MXC_PHYADDR 0 | |
167 | # define CONFIG_FEC_XCV_TYPE RMII | |
168 | # define CONFIG_ETHPRIME "FEC" | |
169 | ||
170 | # define CONFIG_MII | |
171 | # define CONFIG_PHYLIB | |
172 | # define CONFIG_PHY_SMSC | |
173 | #endif | |
174 | ||
ca7463c9 JT |
175 | /* Framebuffer */ |
176 | #ifdef CONFIG_VIDEO_IPUV3 | |
177 | # define CONFIG_IPUV3_CLK 260000000 | |
178 | # define CONFIG_IMX_VIDEO_SKIP | |
179 | ||
180 | # define CONFIG_SPLASH_SCREEN | |
3713571c | 181 | # define CONFIG_SPLASH_SCREEN_ALIGN |
ca7463c9 JT |
182 | # define CONFIG_BMP_16BPP |
183 | # define CONFIG_VIDEO_BMP_RLE8 | |
184 | # define CONFIG_VIDEO_LOGO | |
185 | # define CONFIG_VIDEO_BMP_LOGO | |
186 | #endif | |
187 | ||
f4b7532f JT |
188 | /* SPL */ |
189 | #ifdef CONFIG_SPL | |
023ff2f7 JT |
190 | # ifdef CONFIG_NAND_MXS |
191 | # define CONFIG_SPL_NAND_SUPPORT | |
192 | # else | |
193 | # define CONFIG_SPL_MMC_SUPPORT | |
194 | # endif | |
195 | ||
f4b7532f | 196 | # include "imx6_spl.h" |
f160c5c8 JT |
197 | # ifdef CONFIG_SPL_BUILD |
198 | # undef CONFIG_DM_GPIO | |
199 | # undef CONFIG_DM_MMC | |
200 | # endif | |
f4b7532f JT |
201 | #endif |
202 | ||
203 | #endif /* __IMX6QLD_ICORE_CONFIG_H */ |