[people/ms/u-boot.git] / include / configs / integratorap.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <kshitij@ti.com>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * (C) Copyright 2004
 * ARM Ltd.
 * Philippe Robin, <philippe.robin@arm.com>
 * Configuration for Integrator AP board.
 *.
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_INTEGRATOR
#define CONFIG_ARCH_INTEGRATOR
/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_SYS_TEXT_BASE		0x01000000
#define CONFIG_SYS_MEMTEST_START	0x100000
#define CONFIG_SYS_MEMTEST_END		0x10000000
#define CONFIG_SYS_HZ			1000
#define CONFIG_SYS_HZ_CLOCK		24000000	/* Timer 1 is clocked at 24Mhz */
#define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1		       */

#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_MISC_INIT_R	1	/* call misc_init_r during start up */

#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_CM_INIT		1
#define CONFIG_CM_REMAP		1
#define CONFIG_CM_SPD_DETECT

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128*1024)

/*
 * PL010 Configuration
 */
#define CONFIG_PL010_SERIAL
#define CONFIG_CONS_INDEX	0
#define CONFIG_BAUDRATE		38400
#define CONFIG_PL01x_PORTS	{ (void *) (CONFIG_SYS_SERIAL0), (void *) (CONFIG_SYS_SERIAL1) }
#define CONFIG_SYS_SERIAL0		0x16000000
#define CONFIG_SYS_SERIAL1		0x17000000


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_BOOTDELAY	2
#define CONFIG_BOOTARGS		"root=/dev/mtdblock0 console=ttyAM0 console=tty"
#define CONFIG_BOOTCOMMAND	""

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP	/* undef to save memory	    */
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT	"Integrator-AP # "	/* Monitor Command Prompt   */
#define CONFIG_SYS_CBSIZE	256		/* Console I/O Buffer Size  */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
#define CONFIG_SYS_MAXARGS	16		/* max number of command args	*/
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/

#define CONFIG_SYS_LOAD_ADDR	0x7fc0	/* default load address */

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	/* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000	/* 32 MB */
#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
				    CONFIG_SYS_INIT_RAM_SIZE - \
				    GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET

#define CONFIG_SYS_FLASH_BASE	0x24000000

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CONFIG_SYS_FLASH_CFI		1
#define CONFIG_FLASH_CFI_DRIVER		1
#define CONFIG_ENV_IS_NOWHERE
#define CONFIG_SYS_MAX_FLASH_BANKS	1		/* max number of memory banks */
/* timeout values are in ticks */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Erase */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Write */
#define CONFIG_SYS_MAX_FLASH_SECT	128
#define CONFIG_ENV_SIZE			32768


/*-----------------------------------------------------------------------
 * PCI definitions
 */

#define CONFIG_PCI
#define CONFIG_CMD_PCI
#define CONFIG_PCI_PNP

#define CONFIG_NET_MULTI
#define CONFIG_TULIP
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER	8	/* use 8 rx buffer on eepro100	*/


/*-----------------------------------------------------------------------
 * There are various dependencies on the core module (CM) fitted
 * Users should refer to their CM user guide
 * - when porting adjust u-boot/Makefile accordingly
 *   to define the necessary CONFIG_ s for the CM involved
 * see e.g. integratorcp_CM926EJ-S_config
 */
#include "armcoremodule.h"

#endif	/* __CONFIG_H */
Commit	Line	Data
3d3befa7 WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <kshitij@ti.com>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* (C) Copyright 2004
	8	* ARM Ltd.
	9	* Philippe Robin, <philippe.robin@arm.com>
	10	* Configuration for Integrator AP board.
	11	*.
	12	* See file CREDITS for list of people who contributed to this
	13	* project.
	14	*
	15	* This program is free software; you can redistribute it and/or
	16	* modify it under the terms of the GNU General Public License as
	17	* published by the Free Software Foundation; either version 2 of
	18	* the License, or (at your option) any later version.
	19	*
	20	* This program is distributed in the hope that it will be useful,
	21	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	22	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	23	* GNU General Public License for more details.
	24	*
	25	* You should have received a copy of the GNU General Public License
	26	* along with this program; if not, write to the Free Software
	27	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	28	* MA 02111-1307 USA
	29	*/
fe7eb5d8	30
3d3befa7 WD	31	#ifndef __CONFIG_H
3d3befa7 WD	32	#define __CONFIG_H
23b3ae0f LW	33
	34	#define CONFIG_INTEGRATOR
	35	#define CONFIG_ARCH_INTEGRATOR
3d3befa7 WD	36	/*
	37	* High Level Configuration Options
	38	* (easy to change)
	39	*/
a4c15c01	40	#define CONFIG_SYS_TEXT_BASE 0x01000000
6d0f6bcf JCPV	41	#define CONFIG_SYS_MEMTEST_START 0x100000
	42	#define CONFIG_SYS_MEMTEST_END 0x10000000
	43	#define CONFIG_SYS_HZ 1000
	44	#define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */
	45	#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */
3d3befa7 WD	46
	47	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	48	#define CONFIG_SETUP_MEMORY_TAGS 1
	49	#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */
0148e8cb	50
8fc3bb4b	51	#define CONFIG_SKIP_LOWLEVEL_INIT
716c1dcb WD	52	#define CONFIG_CM_INIT 1
716c1dcb WD	53	#define CONFIG_CM_REMAP 1
26c82638	54	#define CONFIG_CM_SPD_DETECT
0148e8cb	55
3d3befa7 WD	56	/*
	57	* Size of malloc() pool
	58	*/
6d0f6bcf	59	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
3d3befa7 WD	60
	61	/*
	62	* PL010 Configuration
	63	*/
48d0192f	64	#define CONFIG_PL010_SERIAL
3d3befa7	65	#define CONFIG_CONS_INDEX 0
716c1dcb	66	#define CONFIG_BAUDRATE 38400
6d0f6bcf	67	#define CONFIG_PL01x_PORTS { (void ) (CONFIG_SYS_SERIAL0), (void ) (CONFIG_SYS_SERIAL1) }
6d0f6bcf JCPV	68	#define CONFIG_SYS_SERIAL0 0x16000000
6d0f6bcf JCPV	69	#define CONFIG_SYS_SERIAL1 0x17000000
3d3befa7	70
3d3befa7	71
079a136c JL	72	/*
	73	* BOOTP options
	74	*/
	75	#define CONFIG_BOOTP_BOOTFILESIZE
	76	#define CONFIG_BOOTP_BOOTPATH
	77	#define CONFIG_BOOTP_GATEWAY
	78	#define CONFIG_BOOTP_HOSTNAME
	79
	80
1d2c6bc4 JL	81	/*
	82	* Command line configuration.
	83	*/
2458716a	84	#include <config_cmd_default.h>
3d3befa7	85
716c1dcb	86	#define CONFIG_BOOTDELAY 2
bc87d764	87	#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAM0 console=tty"
716c1dcb	88	#define CONFIG_BOOTCOMMAND ""
3d3befa7 WD	89
	90	/*
	91	* Miscellaneous configurable options
	92	*/
6d0f6bcf	93	#define CONFIG_SYS_LONGHELP /* undef to save memory */
e005754b	94	#define CONFIG_SYS_HUSH_PARSER
6d0f6bcf JCPV	95	#define CONFIG_SYS_PROMPT "Integrator-AP # " /* Monitor Command Prompt */
6d0f6bcf JCPV	96	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
3d3befa7	97	/* Print Buffer Size */
6d0f6bcf JCPV	98	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
	99	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	100	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
3d3befa7	101
6d0f6bcf	102	#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */
3d3befa7	103
3d3befa7 WD	104	/*-----------------------------------------------------------------------
	105	* Physical Memory Map
	106	*/
716c1dcb WD	107	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
716c1dcb WD	108	#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
3d3befa7	109	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
a46877cc LW	110	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	111	#define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
	112	#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
	113	CONFIG_SYS_INIT_RAM_SIZE - \
	114	GENERATED_GBL_DATA_SIZE)
	115	#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
3d3befa7	116
46937b27	117	#define CONFIG_SYS_FLASH_BASE 0x24000000
3d3befa7 WD	118
	119	/*-----------------------------------------------------------------------
	120	* FLASH and environment organization
	121	*/
46937b27 JCPV	122	#define CONFIG_SYS_FLASH_CFI 1
46937b27 JCPV	123	#define CONFIG_FLASH_CFI_DRIVER 1
93f6d725	124	#define CONFIG_ENV_IS_NOWHERE
6d0f6bcf	125	#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
3d3befa7	126	/* timeout values are in ticks */
6d0f6bcf JCPV	127	#define CONFIG_SYS_FLASH_ERASE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Erase */
	128	#define CONFIG_SYS_FLASH_WRITE_TOUT (2CONFIG_SYS_HZ) / Timeout for Flash Write */
	129	#define CONFIG_SYS_MAX_FLASH_SECT 128
46937b27	130	#define CONFIG_ENV_SIZE 32768
3d3befa7	131
3d3befa7 WD	132
	133	/*-----------------------------------------------------------------------
	134	* PCI definitions
	135	*/
	136
2458716a LW	137	#define CONFIG_PCI
	138	#define CONFIG_CMD_PCI
	139	#define CONFIG_PCI_PNP
3d3befa7	140
2458716a LW	141	#define CONFIG_NET_MULTI
2458716a LW	142	#define CONFIG_TULIP
3d3befa7	143	#define CONFIG_EEPRO100
6d0f6bcf	144	#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
3d3befa7	145
3d3befa7	146
74f4304e WD	147	/*-----------------------------------------------------------------------
	148	* There are various dependencies on the core module (CM) fitted
	149	* Users should refer to their CM user guide
	150	* - when porting adjust u-boot/Makefile accordingly
	151	* to define the necessary CONFIG_ s for the CM involved
	152	* see e.g. integratorcp_CM926EJ-S_config
	153	*/
9b880bd4	154	#include "armcoremodule.h"
74f4304e	155
716c1dcb	156	#endif /* __CONFIG_H */