]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/kzm9g.h
common, kconfig: move VERSION_VARIABLE to Kconfig
[people/ms/u-boot.git] / include / configs / kzm9g.h
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1/*
2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3 * Copyright (C) 2012 Renesas Solutions Corp.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
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6 */
7
8#ifndef __KZM9G_H
9#define __KZM9G_H
10
11#undef DEBUG
12
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13#define CONFIG_SH73A0
14#define CONFIG_KZM_A9_GT
1cc95f6e 15#define CONFIG_ARCH_RMOBILE_BOARD_STRING "KMC KZM-A9-GT"
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16#define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
17
18#include <asm/arch/rmobile.h>
19
20#define CONFIG_ARCH_CPU_INIT
21#define CONFIG_DISPLAY_CPUINFO
22#define CONFIG_DISPLAY_BOARDINFO
23#define CONFIG_BOARD_EARLY_INIT_F
8d811ca3 24
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25#define CONFIG_CMDLINE_TAG
26#define CONFIG_SETUP_MEMORY_TAGS
27#define CONFIG_INITRD_TAG
28#define CONFIG_DOS_PARTITION
8d811ca3 29
18a65af4 30#define CONFIG_BAUDRATE 115200
8d811ca3 31#define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200"
8d811ca3 32
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33#undef CONFIG_SHOW_BOOT_PROGRESS
34
35/* MEMORY */
36#define KZM_SDRAM_BASE (0x40000000)
37#define PHYS_SDRAM KZM_SDRAM_BASE
38#define PHYS_SDRAM_SIZE (512 * 1024 * 1024)
39#define CONFIG_NR_DRAM_BANKS (1)
40
41/* NOR Flash */
42#define KZM_FLASH_BASE (0x00000000)
43#define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE)
44#define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT)
45#define CONFIG_SYS_MAX_FLASH_BANKS (1)
46#define CONFIG_SYS_MAX_FLASH_SECT (512)
47
48/* prompt */
49#define CONFIG_SYS_LONGHELP
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50#define CONFIG_SYS_CBSIZE 256
51#define CONFIG_SYS_PBSIZE 256
52#define CONFIG_SYS_MAXARGS 16
53#define CONFIG_SYS_BARGSIZE 512
54#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
55
56/* SCIF */
57#define CONFIG_SCIF_CONSOLE
58#define CONFIG_CONS_SCIF4
59#undef CONFIG_SYS_CONSOLE_INFO_QUIET
60#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
61#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
62
63#define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE)
64#define CONFIG_SYS_MEMTEST_END \
65 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
66#undef CONFIG_SYS_ALT_MEMTEST
67#undef CONFIG_SYS_MEMTEST_SCRATCH
68#undef CONFIG_SYS_LOADS_BAUD_CHANGE
69
70#define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */
71#define CONFIG_SYS_INIT_RAM_SIZE (0x10000)
72#define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4)
73#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
74 CONFIG_SYS_INIT_RAM_SIZE - \
75 GENERATED_GBL_DATA_SIZE)
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76#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
77#define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
78#define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
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79#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
80
81#define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE)
82#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
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83#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
84
85#define CONFIG_SYS_TEXT_BASE 0x00000000
86#define CONFIG_STANDALONE_LOAD_ADDR 0x41000000
87
88/* FLASH */
89#define CONFIG_FLASH_CFI_DRIVER
90#define CONFIG_SYS_FLASH_CFI
91#undef CONFIG_SYS_FLASH_QUIET_TEST
92#define CONFIG_SYS_FLASH_EMPTY_INFO
93#define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */
94#define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE
95#define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE
96#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
97
98/* Timeout for Flash erase operations (in ms) */
99#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
100/* Timeout for Flash write operations (in ms) */
101#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
102/* Timeout for Flash set sector lock bit operations (in ms) */
103#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
104/* Timeout for Flash clear lock bit operations (in ms) */
105#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
106
107#undef CONFIG_SYS_FLASH_PROTECTION
108#undef CONFIG_SYS_DIRECT_FLASH_TFTP
109#define CONFIG_ENV_IS_IN_FLASH
110
111/* GPIO / PFC */
112#define CONFIG_SH_GPIO_PFC
113
114/* Clock */
eae6c8ab 115#define CONFIG_GLOBAL_TIMER
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116#define CONFIG_SYS_CLK_FREQ (48000000)
117#define CONFIG_SYS_CPU_CLK (1196000000)
59562ff6 118#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
8d811ca3 119#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
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120
121/* Ether */
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122#define CONFIG_SMC911X
123#define CONFIG_SMC911X_BASE (0x10000000)
124#define CONFIG_SMC911X_32_BIT
38263df8 125#define CONFIG_NFS_TIMEOUT 10000UL
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126
127/* I2C */
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128#define CONFIG_SYS_I2C
129#define CONFIG_SYS_I2C_SH
130#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
131#define CONFIG_SYS_I2C_SH_BASE0 0xE6820000
132#define CONFIG_SYS_I2C_SH_SPEED0 100000
133#define CONFIG_SYS_I2C_SH_BASE1 0xE6822000
134#define CONFIG_SYS_I2C_SH_SPEED1 100000
135#define CONFIG_SYS_I2C_SH_BASE2 0xE6824000
136#define CONFIG_SYS_I2C_SH_SPEED2 100000
137#define CONFIG_SYS_I2C_SH_BASE3 0xE6826000
138#define CONFIG_SYS_I2C_SH_SPEED3 100000
139#define CONFIG_SYS_I2C_SH_BASE4 0xE6828000
140#define CONFIG_SYS_I2C_SH_SPEED4 100000
b1af67fe 141#define CONFIG_SH_I2C_8BIT
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142#define CONFIG_SH_I2C_DATA_HIGH 4
143#define CONFIG_SH_I2C_DATA_LOW 5
144#define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */
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145
146#endif /* __KZM9G_H */