[people/ms/u-boot.git] / include / configs / ls1012a_common.h

/*
 * Copyright 2016 Freescale Semiconductor
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __LS1012A_COMMON_H
#define __LS1012A_COMMON_H

#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_GICV2

#include <asm/arch/config.h>
#include <asm/arch/stream_id_lsch2.h>

#define CONFIG_DISPLAY_BOARDINFO_LATE

#define CONFIG_SYS_CLK_FREQ		125000000

#define CONFIG_SKIP_LOWLEVEL_INIT

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)

#define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
#define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_DDR_BLOCK2_BASE     0x880000000ULL

/* Generic Timer Definitions */
#define COUNTER_FREQUENCY		25000000	/* 25MHz */

/* CSU */
#define CONFIG_LAYERSCAPE_NS_ACCESS

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)

/*SPI device */
#ifdef CONFIG_QSPI_BOOT
#define CONFIG_SYS_QE_FW_IN_SPIFLASH
#define CONFIG_SYS_FMAN_FW_ADDR		0x400d0000
#define CONFIG_ENV_SPI_BUS		0
#define CONFIG_ENV_SPI_CS		0
#define CONFIG_ENV_SPI_MAX_HZ		1000000
#define CONFIG_ENV_SPI_MODE		0x03
#define CONFIG_SPI_FLASH_SPANSION
#define CONFIG_FSL_SPI_INTERFACE
#define CONFIG_SF_DATAFLASH

#define CONFIG_FSL_QSPI
#define QSPI0_AMBA_BASE		0x40000000
#define CONFIG_SPI_FLASH_SPANSION

#define FSL_QSPI_FLASH_SIZE		SZ_64M
#define FSL_QSPI_FLASH_NUM		2

/*
 * Environment
 */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_ENV_SIZE			0x40000          /* 256KB */
#define CONFIG_ENV_OFFSET		0x300000        /* 3MB */
#define CONFIG_ENV_SECT_SIZE		0x40000
#endif

/* SATA */
#define CONFIG_SCSI_AHCI_PLAT

#define CONFIG_SYS_SATA				AHCI_BASE_ADDR

#define CONFIG_SYS_SCSI_MAX_SCSI_ID		1
#define CONFIG_SYS_SCSI_MAX_LUN			1
#define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
						CONFIG_SYS_SCSI_MAX_LUN)

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */

#define CONFIG_CONS_INDEX       1
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE     1
#define CONFIG_SYS_NS16550_CLK          (get_serial_clock())

#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_SYS_HZ			1000

#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE		128

#ifndef CONFIG_SPL_BUILD
#define BOOT_TARGET_DEVICES(func) \
	func(SCSI, scsi, 0) \
	func(MMC, mmc, 0) \
	func(USB, usb, 0)
#include <config_distro_bootcmd.h>
#endif

/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS		\
	"verify=no\0"				\
	"loadaddr=0x80100000\0"			\
	"kernel_addr=0x100000\0"		\
	"fdt_high=0xffffffffffffffff\0"		\
	"initrd_high=0xffffffffffffffff\0"	\
	"kernel_start=0x1000000\0"		\
	"kernel_load=0xa0000000\0"		\
	"kernel_size=0x2800000\0"		\

#undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND		"sf probe 0:0; sf read $kernel_load "\
					"$kernel_start $kernel_size && "\
					"bootm $kernel_load"

/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS		64	/* max command args */

#define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */

#include <asm/arch/soc.h>

#endif /* __LS1012A_COMMON_H */
Commit	Line	Data
9d044fcb PK	1	/*
	2	* Copyright 2016 Freescale Semiconductor
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#ifndef __LS1012A_COMMON_H
	8	#define __LS1012A_COMMON_H
	9
	10	#define CONFIG_FSL_LAYERSCAPE
9d044fcb PK	11	#define CONFIG_GICV2
9d044fcb PK	12
9d044fcb	13	#include <asm/arch/config.h>
9f076dbe	14	#include <asm/arch/stream_id_lsch2.h>
9d044fcb	15
9d044fcb PK	16	#define CONFIG_DISPLAY_BOARDINFO_LATE
9d044fcb PK	17
904110c7	18	#define CONFIG_SYS_CLK_FREQ 125000000
9d044fcb PK	19
9d044fcb PK	20	#define CONFIG_SKIP_LOWLEVEL_INIT
9d044fcb PK	21
	22	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
	23	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
	24
	25	#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
	26	#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
	27	#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
7d559604	28	#define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL
9d044fcb PK	29
9d044fcb PK	30	/* Generic Timer Definitions */
b584510f	31	#define COUNTER_FREQUENCY 25000000 /* 25MHz */
9d044fcb PK	32
	33	/* CSU */
	34	#define CONFIG_LAYERSCAPE_NS_ACCESS
	35
	36	/* Size of malloc() pool */
	37	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024)
	38
	39	/SPI device /
	40	#ifdef CONFIG_QSPI_BOOT
	41	#define CONFIG_SYS_QE_FW_IN_SPIFLASH
	42	#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
	43	#define CONFIG_ENV_SPI_BUS 0
	44	#define CONFIG_ENV_SPI_CS 0
	45	#define CONFIG_ENV_SPI_MAX_HZ 1000000
	46	#define CONFIG_ENV_SPI_MODE 0x03
	47	#define CONFIG_SPI_FLASH_SPANSION
	48	#define CONFIG_FSL_SPI_INTERFACE
	49	#define CONFIG_SF_DATAFLASH
	50
	51	#define CONFIG_FSL_QSPI
	52	#define QSPI0_AMBA_BASE 0x40000000
	53	#define CONFIG_SPI_FLASH_SPANSION
9d044fcb	54
5e3f763a	55	#define FSL_QSPI_FLASH_SIZE SZ_64M
9d044fcb PK	56	#define FSL_QSPI_FLASH_NUM 2
	57
	58	/*
	59	* Environment
	60	*/
	61	#define CONFIG_ENV_OVERWRITE
	62
9d044fcb	63	#define CONFIG_ENV_SIZE 0x40000 /* 256KB */
4def378f	64	#define CONFIG_ENV_OFFSET 0x300000 /* 3MB */
9d044fcb PK	65	#define CONFIG_ENV_SECT_SIZE 0x40000
	66	#endif
	67
ae02cf03 YT	68	/* SATA */
	69	#define CONFIG_SCSI_AHCI_PLAT
	70
	71	#define CONFIG_SYS_SATA AHCI_BASE_ADDR
	72
	73	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	74	#define CONFIG_SYS_SCSI_MAX_LUN 1
	75	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	76	CONFIG_SYS_SCSI_MAX_LUN)
	77
9d044fcb PK	78	/* I2C */
	79	#define CONFIG_SYS_I2C
	80	#define CONFIG_SYS_I2C_MXC
	81	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
	82	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
	83
	84	#define CONFIG_CONS_INDEX 1
	85	#define CONFIG_SYS_NS16550_SERIAL
	86	#define CONFIG_SYS_NS16550_REG_SIZE 1
904110c7	87	#define CONFIG_SYS_NS16550_CLK (get_serial_clock())
9d044fcb	88
9d044fcb PK	89	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
9d044fcb PK	90
9d044fcb PK	91	#define CONFIG_SYS_HZ 1000
	92
	93	#define CONFIG_HWCONFIG
	94	#define HWCONFIG_BUFFER_SIZE 128
	95
a81357a2 RB	96	#ifndef CONFIG_SPL_BUILD
a81357a2 RB	97	#define BOOT_TARGET_DEVICES(func) \
ae02cf03	98	func(SCSI, scsi, 0) \
a81357a2 RB	99	func(MMC, mmc, 0) \
	100	func(USB, usb, 0)
	101	#include <config_distro_bootcmd.h>
	102	#endif
	103
9d044fcb PK	104	/* Initial environment variables */
9d044fcb PK	105	#define CONFIG_EXTRA_ENV_SETTINGS \
9d044fcb	106	"verify=no\0" \
9d044fcb PK	107	"loadaddr=0x80100000\0" \
9d044fcb PK	108	"kernel_addr=0x100000\0" \
9d044fcb PK	109	"fdt_high=0xffffffffffffffff\0" \
9d044fcb PK	110	"initrd_high=0xffffffffffffffff\0" \
4def378f	111	"kernel_start=0x1000000\0" \
9d044fcb PK	112	"kernel_load=0xa0000000\0" \
9d044fcb PK	113	"kernel_size=0x2800000\0" \
9d044fcb	114
a81357a2	115	#undef CONFIG_BOOTCOMMAND
9d044fcb PK	116	#define CONFIG_BOOTCOMMAND "sf probe 0:0; sf read $kernel_load "\
	117	"$kernel_start $kernel_size && "\
	118	"bootm $kernel_load"
9d044fcb PK	119
	120	/* Monitor Command Prompt */
	121	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
9d044fcb PK	122	#define CONFIG_SYS_MAXARGS 64 /* max command args */
9d044fcb PK	123
9d044fcb PK	124	#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
9d044fcb PK	125
457e51cf SG	126	#include <asm/arch/soc.h>
457e51cf SG	127
9d044fcb	128	#endif /* __LS1012A_COMMON_H */