[people/ms/u-boot.git] / include / configs / m53evk.h

/*
 * DENX M53 configuration
 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __M53EVK_CONFIG_H__
#define __M53EVK_CONFIG_H__

#define CONFIG_MX53
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_MXC_GPIO

#include <asm/arch/imx-regs.h>

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_REVISION_TAG
#define CONFIG_SYS_NO_FLASH

#define CONFIG_FIT

#define CONFIG_TIMESTAMP		/* Print image info with timestamp */

/*
 * U-Boot Commands
 */
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_DOS_PARTITION
#define CONFIG_FAT_WRITE

#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BMP
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NAND
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_SATA
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_USB
#define CONFIG_VIDEO

#define CONFIG_REGEX			/* Enable regular expression support */

/*
 * Memory configurations
 */
#define CONFIG_NR_DRAM_BANKS		2
#define PHYS_SDRAM_1			CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
#define PHYS_SDRAM_2			CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
#define PHYS_SDRAM_SIZE			(gd->ram_size)
#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
#define CONFIG_SYS_MEMTEST_START	0x70000000
#define CONFIG_SYS_MEMTEST_END		0x8ff00000

#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_SYS_TEXT_BASE		0x71000000

/*
 * U-Boot general configurations
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE	\
	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
						/* Print buffer size */
#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
						/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
#define CONFIG_AUTO_COMPLETE			/* Command auto complete */
#define CONFIG_CMDLINE_EDITING			/* Command history etc */
#define CONFIG_SYS_HUSH_PARSER

/*
 * Serial Driver
 */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART2_BASE
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/*
 * MMC Driver
 */
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1
#endif

/*
 * NAND
 */
#define CONFIG_ENV_SIZE			(16 * 1024)
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
#define CONFIG_NAND_MXC
#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
#define CONFIG_SYS_NAND_LARGEPAGE
#define CONFIG_MXC_NAND_HWECC
#define CONFIG_SYS_NAND_USE_FLASH_BBT

/* Environment is in NAND */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_SIZE_REDUND		CONFIG_ENV_SIZE
#define CONFIG_ENV_SECT_SIZE		(128 * 1024)
#define CONFIG_ENV_RANGE		(512 * 1024)
#define CONFIG_ENV_OFFSET		0x100000
#define CONFIG_ENV_OFFSET_REDUND	\
		(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)

#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_CMD_MTDPARTS
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT			"nand0=mxc_nand"
#define MTDPARTS_DEFAULT			\
	"mtdparts=mxc_nand:"			\
		"1m(bootloader)ro,"		\
		"512k(environment),"		\
		"512k(redundant-environment),"	\
		"4m(kernel),"			\
		"128k(fdt),"			\
		"8m(ramdisk),"			\
		"-(filesystem)"
#else
#define CONFIG_ENV_IS_NOWHERE
#endif

/*
 * Ethernet on SOC (FEC)
 */
#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define IMX_FEC_BASE			FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR		0x0
#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE		RMII
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#endif

/*
 * I2C
 */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_SPD_BUS_NUM		1 /* I2C2 */
#endif

/*
 * RTC
 */
#ifdef CONFIG_CMD_DATE
#define CONFIG_RTC_M41T62
#define CONFIG_SYS_I2C_RTC_ADDR		0x68
#define CONFIG_SYS_M41T11_BASE_YEAR	2000
#endif

/*
 * USB
 */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX5
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_MXC_USB_PORT		1
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS		0
#endif

/*
 * SATA
 */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif

/*
 * LCD
 */
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_GZIP
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASHIMAGE_GUARD
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE	(2 << 20)
#define CONFIG_IPUV3_CLK		200000000
#endif

/*
 * Boot Linux
 */
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTFILE		"m53evk/uImage"
#define CONFIG_BOOTARGS		"console=ttymxc1,115200"
#define CONFIG_LOADADDR		0x70800000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT

/*
 * NAND SPL
 */
#define CONFIG_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TARGET		"u-boot-with-nand-spl.imx"
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_TEXT_BASE		0x70008000
#define CONFIG_SPL_PAD_TO		0x8000
#define CONFIG_SPL_STACK		0x70004000
#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT

#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_SIZE		(256 * 1024 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0

#endif	/* __M53EVK_CONFIG_H__ */
Commit	Line	Data
0f83b365 MV	1	/*
	2	* DENX M53 configuration
	3	* Copyright (C) 2012-2013 Marek Vasut <marex@denx.de>
	4	*
3765b3e7	5	* SPDX-License-Identifier: GPL-2.0+
0f83b365 MV	6	*/
	7
	8	#ifndef __M53EVK_CONFIG_H__
	9	#define __M53EVK_CONFIG_H__
	10
	11	#define CONFIG_MX53
73ff0448	12	#define CONFIG_SYS_GENERIC_BOARD
0f83b365	13	#define CONFIG_MXC_GPIO
0f83b365 MV	14
	15	#include <asm/arch/imx-regs.h>
	16
	17	#define CONFIG_DISPLAY_CPUINFO
	18	#define CONFIG_BOARD_EARLY_INIT_F
	19	#define CONFIG_REVISION_TAG
	20	#define CONFIG_SYS_NO_FLASH
	21
62d3c2d6 MV	22	#define CONFIG_FIT
	23
	24	#define CONFIG_TIMESTAMP /* Print image info with timestamp */
	25
0f83b365 MV	26	/*
	27	* U-Boot Commands
	28	*/
	29	#include <config_cmd_default.h>
	30	#define CONFIG_DISPLAY_BOARDINFO
	31	#define CONFIG_DOS_PARTITION
62d3c2d6	32	#define CONFIG_FAT_WRITE
0f83b365	33
62d3c2d6 MV	34	#define CONFIG_CMD_ASKENV
62d3c2d6 MV	35	#define CONFIG_CMD_BMP
0f83b365 MV	36	#define CONFIG_CMD_DATE
0f83b365 MV	37	#define CONFIG_CMD_DHCP
62d3c2d6 MV	38	#define CONFIG_CMD_EXT4
62d3c2d6 MV	39	#define CONFIG_CMD_EXT4_WRITE
0f83b365	40	#define CONFIG_CMD_FAT
62d3c2d6	41	#define CONFIG_CMD_GREPENV
0f83b365 MV	42	#define CONFIG_CMD_I2C
	43	#define CONFIG_CMD_MII
	44	#define CONFIG_CMD_MMC
	45	#define CONFIG_CMD_NAND
	46	#define CONFIG_CMD_NET
	47	#define CONFIG_CMD_PING
	48	#define CONFIG_CMD_SATA
62d3c2d6	49	#define CONFIG_CMD_SETEXPR
0f83b365	50	#define CONFIG_CMD_USB
502a710f	51	#define CONFIG_VIDEO
0f83b365	52
9a12fcd0 MV	53	#define CONFIG_REGEX /* Enable regular expression support */
9a12fcd0 MV	54
0f83b365 MV	55	/*
	56	* Memory configurations
	57	*/
	58	#define CONFIG_NR_DRAM_BANKS 2
	59	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
97334c66	60	#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
0f83b365	61	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
97334c66 MV	62	#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
97334c66 MV	63	#define PHYS_SDRAM_SIZE (gd->ram_size)
0f83b365 MV	64	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
0f83b365 MV	65	#define CONFIG_SYS_MEMTEST_START 0x70000000
2f844e76	66	#define CONFIG_SYS_MEMTEST_END 0x8ff00000
0f83b365 MV	67
	68	#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
	69	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
	70	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
	71
	72	#define CONFIG_SYS_INIT_SP_OFFSET \
	73	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	74	#define CONFIG_SYS_INIT_SP_ADDR \
	75	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	76
	77	#define CONFIG_SYS_TEXT_BASE 0x71000000
	78
	79	/*
	80	* U-Boot general configurations
	81	*/
	82	#define CONFIG_SYS_LONGHELP
0f83b365 MV	83	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
	84	#define CONFIG_SYS_PBSIZE \
	85	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	86	/* Print buffer size */
	87	#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
	88	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	89	/* Boot argument buffer size */
	90	#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
	91	#define CONFIG_AUTO_COMPLETE /* Command auto complete */
	92	#define CONFIG_CMDLINE_EDITING /* Command history etc */
	93	#define CONFIG_SYS_HUSH_PARSER
	94
	95	/*
	96	* Serial Driver
	97	*/
	98	#define CONFIG_MXC_UART
	99	#define CONFIG_MXC_UART_BASE UART2_BASE
	100	#define CONFIG_CONS_INDEX 1
	101	#define CONFIG_BAUDRATE 115200
	102
	103	/*
	104	* MMC Driver
	105	*/
	106	#ifdef CONFIG_CMD_MMC
	107	#define CONFIG_MMC
	108	#define CONFIG_GENERIC_MMC
	109	#define CONFIG_FSL_ESDHC
	110	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	111	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	112	#endif
	113
	114	/*
	115	* NAND
	116	*/
	117	#define CONFIG_ENV_SIZE (16 * 1024)
	118	#ifdef CONFIG_CMD_NAND
	119	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	120	#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI
	121	#define CONFIG_NAND_MXC
	122	#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI
	123	#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR
	124	#define CONFIG_SYS_NAND_LARGEPAGE
	125	#define CONFIG_MXC_NAND_HWECC
	126	#define CONFIG_SYS_NAND_USE_FLASH_BBT
	127
	128	/* Environment is in NAND */
	129	#define CONFIG_ENV_IS_IN_NAND
	130	#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
	131	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	132	#define CONFIG_ENV_RANGE (512 * 1024)
	133	#define CONFIG_ENV_OFFSET 0x100000
	134	#define CONFIG_ENV_OFFSET_REDUND \
	135	(CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
	136
	137	#define CONFIG_CMD_UBI
	138	#define CONFIG_CMD_UBIFS
	139	#define CONFIG_CMD_MTDPARTS
	140	#define CONFIG_RBTREE
	141	#define CONFIG_LZO
	142	#define CONFIG_MTD_DEVICE
	143	#define CONFIG_MTD_PARTITIONS
8331273c	144	#define MTDIDS_DEFAULT "nand0=mxc_nand"
0f83b365	145	#define MTDPARTS_DEFAULT \
8331273c	146	"mtdparts=mxc_nand:" \
0f83b365 MV	147	"1m(bootloader)ro," \
	148	"512k(environment)," \
	149	"512k(redundant-environment)," \
	150	"4m(kernel)," \
	151	"128k(fdt)," \
	152	"8m(ramdisk)," \
	153	"-(filesystem)"
	154	#else
	155	#define CONFIG_ENV_IS_NOWHERE
	156	#endif
	157
	158	/*
	159	* Ethernet on SOC (FEC)
	160	*/
	161	#ifdef CONFIG_CMD_NET
	162	#define CONFIG_FEC_MXC
	163	#define IMX_FEC_BASE FEC_BASE_ADDR
	164	#define CONFIG_FEC_MXC_PHYADDR 0x0
	165	#define CONFIG_MII
	166	#define CONFIG_DISCOVER_PHY
	167	#define CONFIG_FEC_XCV_TYPE RMII
	168	#define CONFIG_PHYLIB
	169	#define CONFIG_PHY_MICREL
	170	#endif
	171
	172	/*
	173	* I2C
	174	*/
	175	#ifdef CONFIG_CMD_I2C
b089d039	176	#define CONFIG_SYS_I2C
	177	#define CONFIG_SYS_I2C_MXC
	178	#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */
0f83b365 MV	179	#endif
	180
	181	/*
	182	* RTC
	183	*/
	184	#ifdef CONFIG_CMD_DATE
	185	#define CONFIG_RTC_M41T62
	186	#define CONFIG_SYS_I2C_RTC_ADDR 0x68
	187	#define CONFIG_SYS_M41T11_BASE_YEAR 2000
	188	#endif
	189
	190	/*
	191	* USB
	192	*/
	193	#ifdef CONFIG_CMD_USB
	194	#define CONFIG_USB_EHCI
	195	#define CONFIG_USB_EHCI_MX5
	196	#define CONFIG_USB_STORAGE
	197	#define CONFIG_USB_HOST_ETHER
	198	#define CONFIG_USB_ETHER_ASIX
a743415f	199	#define CONFIG_USB_ETHER_MCS7830
0f83b365 MV	200	#define CONFIG_USB_ETHER_SMSC95XX
	201	#define CONFIG_MXC_USB_PORT 1
	202	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	203	#define CONFIG_MXC_USB_FLAGS 0
	204	#endif
	205
	206	/*
	207	* SATA
	208	*/
	209	#ifdef CONFIG_CMD_SATA
	210	#define CONFIG_DWC_AHSATA
	211	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	212	#define CONFIG_DWC_AHSATA_PORT_ID 0
	213	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR
	214	#define CONFIG_LBA48
	215	#define CONFIG_LIBATA
	216	#endif
	217
502a710f MV	218	/*
	219	* LCD
	220	*/
	221	#ifdef CONFIG_VIDEO
	222	#define CONFIG_VIDEO_IPUV3
	223	#define CONFIG_CFB_CONSOLE
	224	#define CONFIG_VGA_AS_SINGLE_DEVICE
	225	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	226	#define CONFIG_VIDEO_BMP_RLE8
62d3c2d6	227	#define CONFIG_VIDEO_BMP_GZIP
502a710f	228	#define CONFIG_SPLASH_SCREEN
62d3c2d6 MV	229	#define CONFIG_SPLASHIMAGE_GUARD
62d3c2d6 MV	230	#define CONFIG_SPLASH_SCREEN_ALIGN
502a710f MV	231	#define CONFIG_BMP_16BPP
502a710f MV	232	#define CONFIG_VIDEO_LOGO
62d3c2d6 MV	233	#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20)
62d3c2d6 MV	234	#define CONFIG_IPUV3_CLK 200000000
502a710f MV	235	#endif
502a710f MV	236
0f83b365 MV	237	/*
	238	* Boot Linux
	239	*/
	240	#define CONFIG_CMDLINE_TAG
	241	#define CONFIG_INITRD_TAG
	242	#define CONFIG_REVISION_TAG
	243	#define CONFIG_SETUP_MEMORY_TAGS
	244	#define CONFIG_BOOTDELAY 3
	245	#define CONFIG_BOOTFILE "m53evk/uImage"
	246	#define CONFIG_BOOTARGS "console=ttymxc1,115200"
	247	#define CONFIG_LOADADDR 0x70800000
	248	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	249	#define CONFIG_OF_LIBFDT
	250
	251	/*
	252	* NAND SPL
	253	*/
	254	#define CONFIG_SPL
	255	#define CONFIG_SPL_FRAMEWORK
	256	#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx"
	257	#define CONFIG_SPL_BOARD_INIT
	258	#define CONFIG_SPL_TEXT_BASE 0x70008000
	259	#define CONFIG_SPL_PAD_TO 0x8000
	260	#define CONFIG_SPL_STACK 0x70004000
	261	#define CONFIG_SPL_GPIO_SUPPORT
	262	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	263	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	264	#define CONFIG_SPL_NAND_SUPPORT
	265	#define CONFIG_SPL_SERIAL_SUPPORT
	266
	267	#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO
	268	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	269	#define CONFIG_SYS_NAND_OOBSIZE 64
	270	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	271	#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
	272	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
	273
	274	#endif /* __M53EVK_CONFIG_H__ */