]> git.ipfire.org Git - people/ms/u-boot.git/blame - include/configs/malta.h
Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
[people/ms/u-boot.git] / include / configs / malta.h
CommitLineData
5a4dcfac
GJ
1/*
2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
3 *
0b17998e 4 * SPDX-License-Identifier: GPL-2.0
5a4dcfac
GJ
5 */
6
7a9d109b
PB
7#ifndef _MALTA_CONFIG_H
8#define _MALTA_CONFIG_H
5a4dcfac 9
5a4dcfac
GJ
10/*
11 * System configuration
12 */
7a9d109b 13#define CONFIG_MALTA
5a4dcfac 14
ab41305d
GJ
15#define CONFIG_MEMSIZE_IN_BYTES
16
feaa6066 17#define CONFIG_PCI_GT64120
baf37f06 18#define CONFIG_PCI_MSC01
f1957499 19#define CONFIG_PCNET
e0878af8
PB
20#define CONFIG_PCNET_79C973
21#define PCNET_HAS_PROM
feaa6066 22
3ced12a0
PB
23#define CONFIG_MISC_INIT_R
24#define CONFIG_RTC_MC146818
25#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
26
5a4dcfac
GJ
27/*
28 * CPU Configuration
29 */
30#define CONFIG_SYS_MHZ 250 /* arbitrary value */
31#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
5a4dcfac 32
5a4dcfac
GJ
33/*
34 * Memory map
35 */
10473d04 36#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
5a4dcfac 37
0f832b9c
PB
38#ifdef CONFIG_64BIT
39# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
40#else
41# define CONFIG_SYS_SDRAM_BASE 0x80000000
42#endif
5a4dcfac
GJ
43#define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024)
44
45#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
46
0f832b9c
PB
47#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000)
48#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
49#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000)
5a4dcfac
GJ
50
51#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
52#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
67d4752d 53#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
5a4dcfac 54
5a4dcfac
GJ
55#define CONFIG_SYS_CBSIZE 256
56#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
57 sizeof(CONFIG_SYS_PROMPT) + 16)
58#define CONFIG_SYS_MAXARGS 16
59
60#define CONFIG_AUTO_COMPLETE
61#define CONFIG_CMDLINE_EDITING
62
63/*
64 * Serial driver
65 */
66#define CONFIG_BAUDRATE 115200
2e7eb12e 67#define CONFIG_SYS_NS16550_PORT_MAPPED
5a4dcfac 68
5a4dcfac
GJ
69/*
70 * Flash configuration
71 */
0f832b9c
PB
72#ifdef CONFIG_64BIT
73# define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000
74#else
75# define CONFIG_SYS_FLASH_BASE 0xbe000000
76#endif
52caee0f
GJ
77#define CONFIG_SYS_MAX_FLASH_BANKS 1
78#define CONFIG_SYS_MAX_FLASH_SECT 128
79#define CONFIG_SYS_FLASH_CFI
80#define CONFIG_FLASH_CFI_DRIVER
81#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
5a4dcfac 82
fba6f45c
PB
83/*
84 * Environment
85 */
86#define CONFIG_ENV_IS_IN_FLASH
87#define CONFIG_ENV_SECT_SIZE 0x20000
88#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
89#define CONFIG_ENV_ADDR \
90 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
91
ba21a453
PB
92/*
93 * IDE/ATA
94 */
95#define CONFIG_SYS_IDE_MAXBUS 1
96#define CONFIG_SYS_IDE_MAXDEVICE 2
97#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS
98#define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0
99#define CONFIG_SYS_ATA_DATA_OFFSET 0
100#define CONFIG_SYS_ATA_REG_OFFSET 0
101
5a4dcfac
GJ
102/*
103 * Commands
104 */
3ced12a0 105#define CONFIG_CMD_DATE
ba21a453 106#define CONFIG_CMD_IDE
feaa6066
GJ
107#define CONFIG_CMD_PCI
108
5a4dcfac
GJ
109#define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */
110
7a9d109b 111#endif /* _MALTA_CONFIG_H */