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1/*
2 * (C) Copyright 2007-2008
c9e798d3 3 * Stelian Pop <stelian@popies.net>
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4 * Lead Tech Design <www.leadtechdesign.com>
5 *
83bf0057 6 * (C) Copyright 2009-2015
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7 * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
8 * esd electronic system design gmbh <www.esd.eu>
9 *
10 * Configuation settings for the esd MEESC board.
11 *
1a459660 12 * SPDX-License-Identifier: GPL-2.0+
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13 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
17
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18/*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22#include <asm/hardware.h>
23
24/*
25 * Warning: changing CONFIG_SYS_TEXT_BASE requires
26 * adapting the initial boot program.
27 * Since the linker has to swallow that define, we must use a pure
28 * hex number here!
29 */
83bf0057 30#define CONFIG_SYS_TEXT_BASE 0x21F00000
0cb77bfa 31
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32/*
33 * since a number of boards are not being listed in linux
34 * arch/arm/tools/mach-types any more, the mach-types have to be
35 * defined here
36 */
37#define MACH_TYPE_MEESC 2165
38#define MACH_TYPE_ETHERCAN2 2407
39
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40/* ARM asynchronous clock */
41#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */
9f07dede 42#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
33b1d3f4 43
0cb77bfa 44/* Misc CPU related */
33b1d3f4 45#define CONFIG_SKIP_LOWLEVEL_INIT
0cb77bfa 46#define CONFIG_ARCH_CPU_INIT
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47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49#define CONFIG_SERIAL_TAG
50#define CONFIG_REVISION_TAG
51#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
a3f3897b 52#define CONFIG_MISC_INIT_R /* Call misc_init_r */
33b1d3f4 53
0cb77bfa 54#define CONFIG_PREBOOT /* enable preboot variable */
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55
56/*
57 * Hardware drivers
58 */
59
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60/* general purpose I/O */
61#define CONFIG_AT91_GPIO
62
33b1d3f4 63/* Console output */
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64#define CONFIG_ATMEL_USART
65#define CONFIG_USART_BASE ATMEL_BASE_DBGU
66#define CONFIG_USART_ID ATMEL_ID_SYS
67#define CONFIG_BAUDRATE 115200
33b1d3f4 68
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69/*
70 * BOOTP options
71 */
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72#define CONFIG_BOOTP_BOOTFILESIZE
73#define CONFIG_BOOTP_BOOTPATH
74#define CONFIG_BOOTP_GATEWAY
75#define CONFIG_BOOTP_HOSTNAME
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76
77/*
78 * Command line configuration.
79 */
83bf0057 80
83bf0057 81#ifdef CONFIG_SYS_USE_NANDFLASH
0cb77bfa 82#define CONFIG_CMD_NAND
83bf0057 83#endif
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84
85/* LED */
0cb77bfa 86#define CONFIG_AT91_LED
33b1d3f4 87
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88/*
89 * SDRAM: 1 bank, min 32, max 128 MB
90 * Initialized before u-boot gets started.
91 */
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92#define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */
93#define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */
94
0cb77bfa 95#define CONFIG_NR_DRAM_BANKS 1
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96#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
97#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE
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98
99#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000)
100#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000)
101#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000)
102
103/*
104 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
105 * leaving the correct space for initial global data structure above
106 * that address while providing maximum stack area below.
107 */
108#define CONFIG_SYS_INIT_SP_ADDR \
109 (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE)
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110
111/* DataFlash */
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112#ifdef CONFIG_SYS_USE_DATAFLASH
113# define CONFIG_ATMEL_DATAFLASH_SPI
114# define CONFIG_HAS_DATAFLASH
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115# define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
116# define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
117# define AT91_SPI_CLK 15000000
118# define DATAFLASH_TCSS (0x1a << 16)
119# define DATAFLASH_TCHS (0x1 << 24)
120#endif
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121
122/* NOR flash is not populated, disable it */
0cb77bfa 123#define CONFIG_SYS_NO_FLASH
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124
125/* NAND flash */
126#ifdef CONFIG_CMD_NAND
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127# define CONFIG_NAND_ATMEL
128# define CONFIG_SYS_MAX_NAND_DEVICE 1
83bf0057 129# define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */
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130# define CONFIG_SYS_NAND_DBW_8
131# define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
132# define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
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133# define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15)
134# define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22)
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135#endif
136
137/* Ethernet */
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138#define CONFIG_MACB
139#define CONFIG_RMII
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140#define CONFIG_NET_RETRY_COUNT 20
141#undef CONFIG_RESET_PHY_R
142
a380279b 143/* hw-controller addresses */
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144#define CONFIG_ET1100_BASE 0x70000000
145
146#ifdef CONFIG_SYS_USE_DATAFLASH
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147
148/* bootstrap + u-boot + env in dataflash on CS0 */
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149# define CONFIG_ENV_IS_IN_DATAFLASH
150# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
33b1d3f4 151 0x8400)
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152# define CONFIG_ENV_OFFSET 0x4200
153# define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \
33b1d3f4 154 CONFIG_ENV_OFFSET)
0cb77bfa 155# define CONFIG_ENV_SIZE 0x4200
33b1d3f4 156
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157#elif CONFIG_SYS_USE_NANDFLASH
158
159/* bootstrap + u-boot + env + linux in nandflash */
160# define CONFIG_ENV_IS_IN_NAND 1
161# define CONFIG_ENV_OFFSET 0xC0000
162# define CONFIG_ENV_SIZE 0x20000
163
164#endif
33b1d3f4 165
0cb77bfa 166#define CONFIG_SYS_CBSIZE 512
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167#define CONFIG_SYS_MAXARGS 16
168#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
169 sizeof(CONFIG_SYS_PROMPT) + 16)
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170#define CONFIG_SYS_LONGHELP
171#define CONFIG_CMDLINE_EDITING
83bf0057 172#define CONFIG_AUTO_COMPLETE
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173
174/*
175 * Size of malloc() pool
176 */
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177#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \
178 128*1024, 0x1000)
33b1d3f4 179
33b1d3f4 180#endif