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af895e45 | 1 | /* |
bae5407d | 2 | * (C) Copyright 2007-2011 |
af895e45 HS |
3 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
bae5407d GF |
24 | #ifndef __CONFIG_H |
25 | #define __CONFIG_H | |
af895e45 HS |
26 | |
27 | /* | |
28 | * High Level Configuration Options | |
29 | * (easy to change) | |
30 | */ | |
489337f5 | 31 | |
af895e45 | 32 | #define CONFIG_MPC8247 |
489337f5 HB |
33 | #define CONFIG_MGCOGE3NE |
34 | #define CONFIG_HOSTNAME mgcoge3ne | |
35 | #define CONFIG_KM_82XX | |
bae5407d | 36 | #define CONFIG_KM_BOARD_EXTRA_ENV "bobcatreset=true\0" |
af895e45 HS |
37 | |
38 | #define CONFIG_SYS_TEXT_BASE 0xFE000000 | |
39 | ||
40 | /* include common defines/options for all Keymile boards */ | |
264eaa0e VL |
41 | #include "km/keymile-common.h" |
42 | #include "km/km-powerpc.h" | |
af895e45 HS |
43 | |
44 | #define CONFIG_SYS_SDRAM_BASE 0x00000000 | |
45 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 | |
46 | #define CONFIG_SYS_FLASH_SIZE 32 | |
47 | #define CONFIG_SYS_FLASH_CFI | |
48 | #define CONFIG_FLASH_CFI_DRIVER | |
489337f5 HB |
49 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks */ |
50 | #define CONFIG_SYS_MAX_FLASH_SECT 1024 /* | |
af895e45 HS |
51 | * max num of sects on one |
52 | * chip | |
53 | */ | |
54 | ||
55 | #define CONFIG_SYS_FLASH_BASE_1 0x50000000 | |
489337f5 HB |
56 | #define CONFIG_SYS_FLASH_SIZE_1 128 |
57 | ||
58 | #define CONFIG_SYS_FLASH_SIZE_2 0 /* dummy value to calc SYS_OR5 */ | |
af895e45 HS |
59 | |
60 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ | |
61 | CONFIG_SYS_FLASH_BASE_1 } | |
62 | ||
63 | #define MTDIDS_DEFAULT "nor2=app" | |
64 | ||
489337f5 HB |
65 | /* |
66 | * Bank 1 - 60x bus SDRAM | |
67 | * mgcoge3ne has 256M. | |
68 | */ | |
69 | #define SDRAM_MAX_SIZE 0x10000000 /* max. 256 MB */ | |
70 | #define CONFIG_SYS_GLOBAL_SDRAM_LIMIT (512 << 20) /* less than 512 MB */ | |
71 | ||
bae5407d GF |
72 | #define CONFIG_SYS_OR1 ((~(CONFIG_SYS_GLOBAL_SDRAM_LIMIT-1) & \ |
73 | ORxS_SDAM_MSK) |\ | |
489337f5 HB |
74 | ORxS_BPD_4 |\ |
75 | ORxS_ROWST_PBI1_A4 |\ | |
76 | ORxS_NUMR_13) | |
77 | ||
bae5407d GF |
78 | #define CONFIG_SYS_PSDMR ( \ |
79 | PSDMR_PBI |\ | |
80 | PSDMR_SDAM_A17_IS_A5 |\ | |
81 | PSDMR_BSMA_A13_A15 |\ | |
82 | PSDMR_SDA10_PBI1_A6 |\ | |
83 | PSDMR_RFRC_5_CLK |\ | |
84 | PSDMR_PRETOACT_2W |\ | |
85 | PSDMR_ACTTORW_2W |\ | |
86 | PSDMR_LDOTOPRE_1C |\ | |
87 | PSDMR_WRC_2C |\ | |
489337f5 HB |
88 | PSDMR_CL_2) |
89 | ||
af895e45 | 90 | /* include further common stuff for all keymile 82xx boards */ |
264eaa0e | 91 | #include "km/km82xx-common.h" |
af895e45 | 92 | |
bae5407d | 93 | #endif /* __CONFIG_H */ |