]>
Commit | Line | Data |
---|---|---|
3313e0e2 MJ |
1 | /* |
2 | * Configuation settings for MPR2 | |
3 | * | |
4 | * Copyright (C) 2008 | |
5 | * Mark Jonas <mark.jonas@de.bosch.com> | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __MPR2_H | |
27 | #define __MPR2_H | |
28 | ||
29 | /* Supported commands */ | |
bdab39d3 | 30 | #define CONFIG_CMD_SAVEENV |
3313e0e2 MJ |
31 | #define CONFIG_CMD_CACHE |
32 | #define CONFIG_CMD_MEMORY | |
33 | #define CONFIG_CMD_FLASH | |
34 | ||
35 | /* Default environment variables */ | |
36 | #define CONFIG_BAUDRATE 115200 | |
37 | #define CONFIG_BOOTARGS "console=ttySC0,115200" | |
38 | #define CONFIG_BOOTFILE /boot/zImage | |
39 | #define CONFIG_LOADADDR 0x8E000000 | |
40 | #define CONFIG_VERSION_VARIABLE | |
41 | ||
42 | /* CPU and platform */ | |
43 | #define CONFIG_SH 1 | |
44 | #define CONFIG_SH3 1 | |
45 | #define CONFIG_CPU_SH7720 1 | |
46 | #define CONFIG_MPR2 1 | |
47 | ||
48 | /* U-Boot internals */ | |
6d0f6bcf JCPV |
49 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
50 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ | |
51 | #define CONFIG_SYS_CBSIZE 256 /* Buffer size for input from the Console */ | |
52 | #define CONFIG_SYS_PBSIZE 256 /* Buffer size for Console output */ | |
53 | #define CONFIG_SYS_MAXARGS 16 /* max args accepted for monitor commands */ | |
54 | #define CONFIG_SYS_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */ | |
55 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */ | |
56 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) | |
57 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE | |
58 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) | |
59 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) | |
60 | #define CONFIG_SYS_GBL_DATA_SIZE 256 | |
3313e0e2 MJ |
61 | |
62 | /* Memory */ | |
6d0f6bcf JCPV |
63 | #define CONFIG_SYS_SDRAM_BASE 0x8C000000 |
64 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) | |
65 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
66 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) | |
3313e0e2 MJ |
67 | |
68 | /* Flash */ | |
6d0f6bcf | 69 | #define CONFIG_SYS_FLASH_CFI |
00b1883a | 70 | #define CONFIG_FLASH_CFI_DRIVER |
6d0f6bcf JCPV |
71 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
72 | #define CONFIG_SYS_FLASH_BASE 0xA0000000 | |
73 | #define CONFIG_SYS_MAX_FLASH_SECT 256 | |
74 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
75 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } | |
5a1aceb0 | 76 | #define CONFIG_ENV_IS_IN_FLASH |
0e8d1586 JCPV |
77 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) |
78 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
6d0f6bcf JCPV |
79 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
80 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 | |
81 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 | |
3313e0e2 MJ |
82 | |
83 | /* Clocks */ | |
84 | #define CONFIG_SYS_CLK_FREQ 24000000 | |
85 | #define TMU_CLK_DIVIDER 4 /* 4 (default), 16, 64, 256 or 1024 */ | |
6d0f6bcf | 86 | #define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER) |
3313e0e2 MJ |
87 | |
88 | /* UART */ | |
6c58a030 | 89 | #define CONFIG_SCIF_CONSOLE 1 |
3313e0e2 MJ |
90 | #define CONFIG_CONS_SCIF0 1 |
91 | ||
92 | #endif /* __MPR2_H */ |