[people/ms/u-boot.git] / include / configs / ms7722se.h

/*
 * Configuation settings for the Hitachi Solution Engine 7722
 *
 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __MS7722SE_H
#define __MS7722SE_H

#define CONFIG_SH		1
#define CONFIG_SH4		1
#define CONFIG_CPU_SH7722	1
#define CONFIG_MS7722SE		1

#define CONFIG_CMD_FLASH
#define CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DFL
#define CONFIG_CMD_SDRAM
#define CONFIG_CMD_ENV

#define CONFIG_BAUDRATE		115200
#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttySC0,115200 root=1f01"

#define CONFIG_VERSION_VARIABLE
#undef  CONFIG_SHOW_BOOT_PROGRESS

/* SMC9111 */
#define CONFIG_DRIVER_SMC91111
#define CONFIG_SMC91111_BASE    (0xB8000000)

/* MEMORY */
#define MS7722SE_SDRAM_BASE	(0x8C000000)
#define MS7722SE_FLASH_BASE_1	(0xA0000000)
#define MS7722SE_FLASH_BANK_SIZE	(8*1024 * 1024)

#define CFG_LONGHELP				/* undef to save memory	*/
#define CFG_PROMPT		"=> "		/* Monitor Command Prompt */
#define CFG_CBSIZE		256		/* Buffer size for input from the Console */
#define CFG_PBSIZE		256		/* Buffer size for Console output */
#define CFG_MAXARGS		16		/* max args accepted for monitor commands */
#define CFG_BARGSIZE		512		/* Buffer size for Boot Arguments passed to kernel */
#define CFG_BAUDRATE_TABLE	{ 115200 }	/* List of legal baudrate settings for this board */

/* SCIF */
#define CONFIG_SCIF_CONSOLE	1
#define CONFIG_CONS_SCIF0	1
#undef  CFG_CONSOLE_INFO_QUIET			/* Suppress display of console information at boot */
#undef  CFG_CONSOLE_OVERWRITE_ROUTINE
#undef  CFG_CONSOLE_ENV_OVERWRITE

#define CFG_MEMTEST_START	(MS7722SE_SDRAM_BASE)
#define CFG_MEMTEST_END		(CFG_MEMTEST_START + (60 * 1024 * 1024))

#undef  CFG_ALT_MEMTEST		/* Enable alternate, more extensive, memory test */
#undef  CFG_MEMTEST_SCRATCH	/* Scratch address used by the alternate memory test */

#undef  CFG_LOADS_BAUD_CHANGE	/* Enable temporary baudrate change while serial download */

#define CFG_SDRAM_BASE	(MS7722SE_SDRAM_BASE)
#define CFG_SDRAM_SIZE	(64 * 1024 * 1024)	/* maybe more, but if so u-boot doesn't know about it... */

#define CFG_LOAD_ADDR	(CFG_SDRAM_BASE + 4 * 1024 * 1024)	/* default load address for scripts ?!? */

#define CFG_MONITOR_BASE	(MS7722SE_FLASH_BASE_1)	/* Address of u-boot image
							in Flash (NOT run time address in SDRAM) ?!? */
#define CFG_MONITOR_LEN	(128 * 1024)		/* */
#define CFG_MALLOC_LEN	(256 * 1024)		/* Size of DRAM reserved for malloc() use */
#define CFG_GBL_DATA_SIZE	(256)		/* size in bytes reserved for initial data */
#define CFG_BOOTMAPSZ	(8 * 1024 * 1024)

/* FLASH */
#define CFG_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#undef  CFG_FLASH_QUIET_TEST
#define CFG_FLASH_EMPTY_INFO			/* print 'E' for empty sector on flinfo */

#define CFG_FLASH_BASE		(MS7722SE_FLASH_BASE_1)	/* Physical start address of Flash memory */

#define CFG_MAX_FLASH_SECT	150		/* Max number of sectors on each
							Flash chip */

/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
#define CFG_MAX_FLASH_BANKS	2
#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
				  CFG_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
				}

#define CFG_FLASH_ERASE_TOUT	(3 * 1000)	/* Timeout for Flash erase operations (in ms) */
#define CFG_FLASH_WRITE_TOUT	(3 * 1000)	/* Timeout for Flash write operations (in ms) */
#define CFG_FLASH_LOCK_TOUT	(3 * 1000)	/* Timeout for Flash set sector lock bit operations (in ms) */
#define CFG_FLASH_UNLOCK_TOUT	(3 * 1000)	/* Timeout for Flash clear lock bit operations (in ms) */

#undef  CFG_FLASH_PROTECTION			/* Use hardware flash sectors protection instead of U-Boot software protection */

#undef  CFG_DIRECT_FLASH_TFTP

#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SECT_SIZE	(8 * 1024)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR		(CFG_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
#define CONFIG_ENV_OFFSET		(CONFIG_ENV_ADDR - CFG_FLASH_BASE)	/* Offset of env Flash sector relative to CFG_FLASH_BASE */
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR_REDUND	(CFG_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))

/* Board Clock */
#define CONFIG_SYS_CLK_FREQ	33333333
#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
#define CFG_HZ			(CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)

#endif	/* __MS7722SE_H */
Commit	Line	Data
6c0bbdcc NI	1	/*
	2	* Configuation settings for the Hitachi Solution Engine 7722
	3	*
	4	* Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
	5	*
	6	* See file CREDITS for list of people who contributed to this
	7	* project.
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	22	* MA 02111-1307 USA
	23	*/
	24
	25	#ifndef __MS7722SE_H
	26	#define __MS7722SE_H
	27
6c0bbdcc NI	28	#define CONFIG_SH 1
	29	#define CONFIG_SH4 1
	30	#define CONFIG_CPU_SH7722 1
	31	#define CONFIG_MS7722SE 1
	32
	33	#define CONFIG_CMD_FLASH
	34	#define CONFIG_CMD_NET
	35	#define CONFIG_CMD_PING
	36	#define CONFIG_CMD_DFL
	37	#define CONFIG_CMD_SDRAM
	38	#define CONFIG_CMD_ENV
	39
	40	#define CONFIG_BAUDRATE 115200
	41	#define CONFIG_BOOTDELAY 3
53677ef1	42	#define CONFIG_BOOTARGS "console=ttySC0,115200 root=1f01"
6c0bbdcc NI	43
	44	#define CONFIG_VERSION_VARIABLE
	45	#undef CONFIG_SHOW_BOOT_PROGRESS
	46
	47	/* SMC9111 */
	48	#define CONFIG_DRIVER_SMC91111
	49	#define CONFIG_SMC91111_BASE (0xB8000000)
	50
	51	/* MEMORY */
	52	#define MS7722SE_SDRAM_BASE (0x8C000000)
	53	#define MS7722SE_FLASH_BASE_1 (0xA0000000)
6c0bbdcc NI	54	#define MS7722SE_FLASH_BANK_SIZE (81024 1024)
	55
	56	#define CFG_LONGHELP /* undef to save memory */
	57	#define CFG_PROMPT "=> " /* Monitor Command Prompt */
	58	#define CFG_CBSIZE 256 /* Buffer size for input from the Console */
	59	#define CFG_PBSIZE 256 /* Buffer size for Console output */
	60	#define CFG_MAXARGS 16 /* max args accepted for monitor commands */
	61	#define CFG_BARGSIZE 512 /* Buffer size for Boot Arguments passed to kernel */
	62	#define CFG_BAUDRATE_TABLE { 115200 } /* List of legal baudrate settings for this board */
	63
	64	/* SCIF */
6c58a030	65	#define CONFIG_SCIF_CONSOLE 1
6c0bbdcc NI	66	#define CONFIG_CONS_SCIF0 1
	67	#undef CFG_CONSOLE_INFO_QUIET /* Suppress display of console information at boot */
	68	#undef CFG_CONSOLE_OVERWRITE_ROUTINE
	69	#undef CFG_CONSOLE_ENV_OVERWRITE
	70
	71	#define CFG_MEMTEST_START (MS7722SE_SDRAM_BASE)
	72	#define CFG_MEMTEST_END (CFG_MEMTEST_START + (60 * 1024 * 1024))
	73
	74	#undef CFG_ALT_MEMTEST /* Enable alternate, more extensive, memory test */
	75	#undef CFG_MEMTEST_SCRATCH /* Scratch address used by the alternate memory test */
	76
	77	#undef CFG_LOADS_BAUD_CHANGE /* Enable temporary baudrate change while serial download */
	78
	79	#define CFG_SDRAM_BASE (MS7722SE_SDRAM_BASE)
	80	#define CFG_SDRAM_SIZE (64 * 1024 * 1024) /* maybe more, but if so u-boot doesn't know about it... */
	81
	82	#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 4 * 1024 * 1024) /* default load address for scripts ?!? */
	83
61fb15c5	84	#define CFG_MONITOR_BASE (MS7722SE_FLASH_BASE_1) /* Address of u-boot image
53677ef1	85	in Flash (NOT run time address in SDRAM) ?!? */
6c0bbdcc NI	86	#define CFG_MONITOR_LEN (128 * 1024) /* */
	87	#define CFG_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */
	88	#define CFG_GBL_DATA_SIZE (256) /* size in bytes reserved for initial data */
61fb15c5	89	#define CFG_BOOTMAPSZ (8 * 1024 * 1024)
6c0bbdcc NI	90
	91	/* FLASH */
	92	#define CFG_FLASH_CFI
00b1883a	93	#define CONFIG_FLASH_CFI_DRIVER
6c0bbdcc NI	94	#undef CFG_FLASH_QUIET_TEST
	95	#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
	96
	97	#define CFG_FLASH_BASE (MS7722SE_FLASH_BASE_1) /* Physical start address of Flash memory */
	98
61fb15c5	99	#define CFG_MAX_FLASH_SECT 150 /* Max number of sectors on each
53677ef1	100	Flash chip */
6c0bbdcc NI	101
	102	/* if you use all NOR Flash , you change dip-switch. Please see MS7722SE01 Manual. */
	103	#define CFG_MAX_FLASH_BANKS 2
	104	#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE + (0 * MS7722SE_FLASH_BANK_SIZE), \
	105	CFG_FLASH_BASE + (1 * MS7722SE_FLASH_BANK_SIZE), \
	106	}
	107
	108	#define CFG_FLASH_ERASE_TOUT (3 * 1000) /* Timeout for Flash erase operations (in ms) */
	109	#define CFG_FLASH_WRITE_TOUT (3 * 1000) /* Timeout for Flash write operations (in ms) */
	110	#define CFG_FLASH_LOCK_TOUT (3 * 1000) /* Timeout for Flash set sector lock bit operations (in ms) */
	111	#define CFG_FLASH_UNLOCK_TOUT (3 * 1000) /* Timeout for Flash clear lock bit operations (in ms) */
	112
	113	#undef CFG_FLASH_PROTECTION /* Use hardware flash sectors protection instead of U-Boot software protection */
	114
	115	#undef CFG_DIRECT_FLASH_TFTP
	116
5a1aceb0	117	#define CONFIG_ENV_IS_IN_FLASH
6c0bbdcc	118	#define CONFIG_ENV_OVERWRITE 1
0e8d1586 JCPV	119	#define CONFIG_ENV_SECT_SIZE (8 * 1024)
	120	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	121	#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + (1 * CONFIG_ENV_SECT_SIZE))
	122	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CFG_FLASH_BASE) /* Offset of env Flash sector relative to CFG_FLASH_BASE */
	123	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
	124	#define CONFIG_ENV_ADDR_REDUND (CFG_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
6c0bbdcc NI	125
	126	/* Board Clock */
	127	#define CONFIG_SYS_CLK_FREQ 33333333
61fb15c5	128	#define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */
6c0bbdcc NI	129	#define CFG_HZ (CONFIG_SYS_CLK_FREQ / TMU_CLK_DIVIDER)
	130
	131	#endif /* __MS7722SE_H */