[people/ms/u-boot.git] / include / configs / mv-common.h

/*
 * (C) Copyright 2010
 * Marvell Semiconductor <www.marvell.com>
 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/*
 * This file contains Marvell Board Specific common defincations.
 * This file should be included in board config header file.
 *
 * It supports common definations for Kirkwood platform
 * TBD: support for Orion5X platforms
 */

#ifndef _MV_COMMON_H
#define _MV_COMMON_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_MARVELL		1

/*
 * Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h
 */

/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE	0x00000000

/*
 * CLKs configurations
 */

/*
 * NS16550 Configuration
 */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
#if !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_COM1		MV_UART_CONSOLE_BASE
#endif

/*
 * Serial Port configuration
 * The following definitions let you select what serial you want to use
 * for your console driver.
 */

#define CONFIG_CONS_INDEX	1	/*Console on UART0 */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, \
					  115200,230400, 460800, 921600 }
/* auto boot */
#define CONFIG_PREBOOT

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_CMDLINE_TAG	1	/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG	1	/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS 1	/* enable memory tag */

#define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buff Size */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(1024 * 1024 * 4) /* 4MiB for malloc() */

/*
 * Other required minimal configurations
 */
#define CONFIG_ARCH_CPU_INIT	/* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS	32	/* max number of command args */

/* ====> Include platform Common Definitions */
#include <asm/arch/config.h>

/*
 * DRAM Banks configuration, Custom config can be done in <board>.h
 */
#ifndef CONFIG_NR_DRAM_BANKS
#define CONFIG_NR_DRAM_BANKS	CONFIG_NR_DRAM_BANKS_MAX
#else
#if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX)
#error CONFIG_NR_DRAM_BANKS Configurated more than available
#endif
#endif /* CONFIG_NR_DRAM_BANKS */

/* ====> Include driver Common Definitions */
/*
 * Common NAND configuration
 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE     1
#endif

/*
 * Common SPI Flash configuration
 */
#ifdef CONFIG_CMD_SF
#endif

/*
 * File system
 */
#ifdef CONFIG_SYS_MVFS
#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
#endif

#endif /* _MV_COMMON_H */
Commit	Line	Data
54e999a3 PW	1	/*
	2	* (C) Copyright 2010
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
54e999a3 PW	7	*/
	8
	9	/*
	10	* This file contains Marvell Board Specific common defincations.
	11	* This file should be included in board config header file.
	12	*
	13	* It supports common definations for Kirkwood platform
	14	* TBD: support for Orion5X platforms
	15	*/
	16
	17	#ifndef _MV_COMMON_H
	18	#define _MV_COMMON_H
	19
	20	/*
	21	* High Level Configuration Options (easy to change)
	22	*/
	23	#define CONFIG_MARVELL 1
54e999a3	24
8e14ed85 PW	25	/*
	26	* Custom CONFIG_SYS_TEXT_BASE can be done in <board>.h
	27	*/
8e14ed85	28
0b20ed76	29	/* additions for new ARM relocation support */
8e14ed85	30	#define CONFIG_SYS_SDRAM_BASE 0x00000000
0b20ed76	31
54e999a3 PW	32	/*
	33	* CLKs configurations
	34	*/
54e999a3 PW	35
	36	/*
	37	* NS16550 Configuration
	38	*/
54e999a3	39	#define CONFIG_SYS_NS16550_SERIAL
54e999a3	40	#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
1d51ea19 SR	41	#if !defined(CONFIG_DM_SERIAL)
1d51ea19 SR	42	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
8e14ed85	43	#define CONFIG_SYS_NS16550_COM1 MV_UART_CONSOLE_BASE
1d51ea19	44	#endif
54e999a3 PW	45
	46	/*
	47	* Serial Port configuration
	48	* The following definitions let you select what serial you want to use
	49	* for your console driver.
	50	*/
	51
	52	#define CONFIG_CONS_INDEX 1 /Console on UART0 /
54e999a3 PW	53	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
	54	115200,230400, 460800, 921600 }
	55	/* auto boot */
b81d0ea7	56	#define CONFIG_PREBOOT
54e999a3 PW	57
	58	/*
	59	* For booting Linux, the board info and command line data
	60	* have to be in the first 8 MB of memory, since this is
	61	* the maximum mapped by the Linux kernel during initialization.
	62	*/
	63	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	64	#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
	65	#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
	66
54e999a3	67	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
54e999a3	68
54e999a3 PW	69	/*
	70	* Size of malloc() pool
	71	*/
bfbfab94	72	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 * 4) /* 4MiB for malloc() */
54e999a3 PW	73
	74	/*
	75	* Other required minimal configurations
	76	*/
54e999a3	77	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
54e999a3	78	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
8e14ed85 PW	79	#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
8e14ed85 PW	80	#define CONFIG_SYS_MEMTEST_END 0x00ffffff /(_16M -1) /
54e999a3	81	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
5a9749ee	82	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
54e999a3	83
2f795ac7 SG	84	/* ====> Include platform Common Definitions */
	85	#include <asm/arch/config.h>
	86
8e14ed85 PW	87	/*
	88	* DRAM Banks configuration, Custom config can be done in <board>.h
	89	*/
	90	#ifndef CONFIG_NR_DRAM_BANKS
	91	#define CONFIG_NR_DRAM_BANKS CONFIG_NR_DRAM_BANKS_MAX
	92	#else
	93	#if (CONFIG_NR_DRAM_BANKS > CONFIG_NR_DRAM_BANKS_MAX)
	94	#error CONFIG_NR_DRAM_BANKS Configurated more than available
	95	#endif
	96	#endif /* CONFIG_NR_DRAM_BANKS */
	97
2f795ac7	98	/* ====> Include driver Common Definitions */
54e999a3	99	/*
cf946c6d	100	* Common NAND configuration
54e999a3	101	*/
cf946c6d LW	102	#ifdef CONFIG_CMD_NAND
cf946c6d LW	103	#define CONFIG_SYS_MAX_NAND_DEVICE 1
cf946c6d LW	104	#endif
	105
	106	/*
	107	* Common SPI Flash configuration
	108	*/
	109	#ifdef CONFIG_CMD_SF
cf946c6d	110	#endif
54e999a3	111
54e999a3 PW	112	/*
	113	* File system
	114	*/
cf946c6d	115	#ifdef CONFIG_SYS_MVFS
54e999a3 PW	116	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
54e999a3 PW	117	#define CONFIG_MTD_PARTITIONS
cf946c6d	118	#endif
54e999a3 PW	119
54e999a3 PW	120	#endif /* _MV_COMMON_H */