[people/ms/u-boot.git] / include / configs / mvebu_armada-8k.h

/*
 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _CONFIG_MVEBU_ARMADA_8K_H
#define _CONFIG_MVEBU_ARMADA_8K_H

/*
 * High Level Configuration Options (easy to change)
 */
#define CONFIG_SYS_TCLK		250000000	/* 250MHz */

#define CONFIG_DISPLAY_BOARDINFO_LATE

/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE	0x00000000

#define CONFIG_NR_DRAM_BANKS	1

/* auto boot */
#define CONFIG_PREBOOT

#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, \
					  115200, 230400, 460800, 921600 }

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
#define CONFIG_INITRD_TAG		/* enable INITRD tag */
#define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */

#define	CONFIG_SYS_CBSIZE	1024	/* Console I/O Buff Size */

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	(4 << 20) /* 4MiB for malloc() */

/*
 * Other required minimal configurations
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
#define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
#define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
#define CONFIG_SYS_MAXARGS	32	/* max number of command args */

#define CONFIG_SYS_ALT_MEMTEST

/* End of 16M scrubbed by training in bootrom */
#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE + 0xFF0000)

/*
 * SPI Flash configuration
 */
#define CONFIG_KIRKWOOD_SPI
#define CONFIG_ENV_SPI_BUS		0
#define CONFIG_ENV_SPI_CS		0

/* SPI NOR flash default params, used by sf commands */
#define CONFIG_SF_DEFAULT_SPEED		1000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE

#define CONFIG_ENV_OFFSET		0x180000 /* as Marvell U-Boot version */
#define CONFIG_ENV_SIZE			(64 << 10) /* 64KiB */
#define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64KiB sectors */

#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_MAX_CHIPS	1
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_NAND_USE_FLASH_BBT

/*
 * Ethernet Driver configuration
 */
#define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
#define CONFIG_ARP_TIMEOUT	200
#define CONFIG_NET_RETRY_COUNT	50

#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)

/* USB ethernet */

/*
 * SATA/SCSI/AHCI configuration
 */
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_LBA48
#define CONFIG_SYS_64BIT_LBA

#define CONFIG_SYS_SCSI_MAX_SCSI_ID	2
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)

/*
 * PCI configuration
 */
#ifdef CONFIG_PCIE_DW_MVEBU
#define CONFIG_E1000
#endif

#endif /* _CONFIG_MVEBU_ARMADA_8K_H */
Commit	Line	Data
6f8c2d49 SR	1	/*
	2	* Copyright (C) 2016 Stefan Roese <sr@denx.de>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
633fa0e7 SR	7	#ifndef _CONFIG_MVEBU_ARMADA_8K_H
633fa0e7 SR	8	#define _CONFIG_MVEBU_ARMADA_8K_H
6f8c2d49 SR	9
	10	/*
	11	* High Level Configuration Options (easy to change)
	12	*/
	13	#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
	14
	15	#define CONFIG_DISPLAY_BOARDINFO_LATE
6f8c2d49	16
6f8c2d49 SR	17	/* additions for new ARM relocation support */
	18	#define CONFIG_SYS_SDRAM_BASE 0x00000000
	19
	20	#define CONFIG_NR_DRAM_BANKS 1
	21
	22	/* auto boot */
	23	#define CONFIG_PREBOOT
	24
6f8c2d49 SR	25	#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
	26	115200, 230400, 460800, 921600 }
	27
	28	/*
	29	* For booting Linux, the board info and command line data
	30	* have to be in the first 8 MB of memory, since this is
	31	* the maximum mapped by the Linux kernel during initialization.
	32	*/
	33	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	34	#define CONFIG_INITRD_TAG /* enable INITRD tag */
	35	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
	36
	37	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
6f8c2d49 SR	38
	39	/*
	40	* Size of malloc() pool
	41	*/
	42	#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
	43
	44	/*
	45	* Other required minimal configurations
	46	*/
	47	#define CONFIG_SYS_LONGHELP
	48	#define CONFIG_AUTO_COMPLETE
	49	#define CONFIG_CMDLINE_EDITING
6f8c2d49	50	#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
6f8c2d49 SR	51	#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
	52	#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
	53	#define CONFIG_SYS_MEMTEST_END 0x00ffffff /(_16M -1) /
	54	#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
	55	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
	56
6f8c2d49 SR	57	#define CONFIG_SYS_ALT_MEMTEST
	58
	59	/* End of 16M scrubbed by training in bootrom */
	60	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
	61
	62	/*
	63	* SPI Flash configuration
	64	*/
	65	#define CONFIG_KIRKWOOD_SPI
	66	#define CONFIG_ENV_SPI_BUS 0
	67	#define CONFIG_ENV_SPI_CS 0
	68
	69	/* SPI NOR flash default params, used by sf commands */
	70	#define CONFIG_SF_DEFAULT_SPEED 1000000
	71	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	72	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	73
6f8c2d49 SR	74	#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
	75	#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
	76	#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
	77
f59472e8 KP	78	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	79	#define CONFIG_SYS_NAND_MAX_CHIPS 1
	80	#define CONFIG_SYS_NAND_ONFI_DETECTION
	81	#define CONFIG_SYS_NAND_USE_FLASH_BBT
	82
def84429 SR	83	/*
	84	* Ethernet Driver configuration
	85	*/
	86	#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
def84429 SR	87	#define CONFIG_ARP_TIMEOUT 200
	88	#define CONFIG_NET_RETRY_COUNT 50
	89
cbb89ed0	90	#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
6f8c2d49 SR	91
6f8c2d49 SR	92	/* USB ethernet */
6f8c2d49 SR	93
	94	/*
	95	* SATA/SCSI/AHCI configuration
	96	*/
6f8c2d49	97	#define CONFIG_SCSI_AHCI_PLAT
6f8c2d49 SR	98	#define CONFIG_LBA48
	99	#define CONFIG_SYS_64BIT_LBA
	100
	101	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
	102	#define CONFIG_SYS_SCSI_MAX_LUN 1
	103	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	104	CONFIG_SYS_SCSI_MAX_LUN)
	105
1ec5aa63 SR	106	/*
	107	* PCI configuration
	108	*/
	109	#ifdef CONFIG_PCIE_DW_MVEBU
	110	#define CONFIG_E1000
1ec5aa63 SR	111	#endif
1ec5aa63 SR	112
633fa0e7	113	#endif /* _CONFIG_MVEBU_ARMADA_8K_H */