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Commit | Line | Data |
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2d24a3a7 WD |
1 | /* |
2 | * include/configs/mx1ads.h | |
49822e23 | 3 | * |
2d24a3a7 WD |
4 | * (c) Copyright 2004 |
5 | * Techware Information Technology, Inc. | |
6 | * http://www.techware.com.tw/ | |
7 | * | |
8 | * Ming-Len Wu <minglen_wu@techware.com.tw> | |
9 | * | |
10 | * This is the Configuration setting for Motorola MX1ADS board | |
11 | * | |
1a459660 | 12 | * SPDX-License-Identifier: GPL-2.0+ |
2d24a3a7 WD |
13 | */ |
14 | ||
2d24a3a7 WD |
15 | #ifndef __CONFIG_H |
16 | #define __CONFIG_H | |
17 | ||
2d24a3a7 WD |
18 | /* |
19 | * High Level Configuration Options | |
20 | * (easy to change) | |
21 | */ | |
22 | #define CONFIG_ARM920T 1 /* This is an ARM920T Core */ | |
281e00a3 WD |
23 | #define CONFIG_IMX 1 /* It's a Motorola MC9328 SoC */ |
24 | #define CONFIG_MX1ADS 1 /* on a Motorola MX1ADS Board */ | |
2d24a3a7 | 25 | |
281e00a3 WD |
26 | /* |
27 | * Select serial console configuration | |
28 | */ | |
d3e55d07 | 29 | #define CONFIG_IMX_SERIAL |
281e00a3 WD |
30 | #define CONFIG_IMX_SERIAL1 /* internal uart 1 */ |
31 | /* #define _CONFIG_UART2 */ /* internal uart 2 */ | |
32 | /* #define CONFIG_SILENT_CONSOLE */ /* use this to disable output */ | |
2d24a3a7 | 33 | |
9660e442 | 34 | #define CONFIG_BOARD_LATE_INIT |
2d24a3a7 | 35 | #define USE_920T_MMU 1 |
2d24a3a7 | 36 | |
49822e23 | 37 | #if 0 |
6d0f6bcf JCPV |
38 | #define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ |
39 | #define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ | |
40 | #define CONFIG_SYS_MX1_GPCR 0x000003AB /* for MX1ADS 0L44N */ | |
49822e23 | 41 | #endif |
2d24a3a7 WD |
42 | |
43 | /* | |
44 | * Size of malloc() pool | |
45 | */ | |
46 | ||
6d0f6bcf | 47 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
281e00a3 | 48 | |
2d24a3a7 WD |
49 | /* |
50 | * CS8900 Ethernet drivers | |
51 | */ | |
b1c0eaac BW |
52 | #define CONFIG_CS8900 /* we have a CS8900 on-board */ |
53 | #define CONFIG_CS8900_BASE 0x15000300 | |
54 | #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */ | |
2d24a3a7 WD |
55 | |
56 | /* | |
57 | * select serial console configuration | |
58 | */ | |
59 | ||
281e00a3 | 60 | /* #define CONFIG_UART1 */ |
2d24a3a7 WD |
61 | /* #define CONFIG_UART2 1 */ |
62 | ||
63 | #define CONFIG_BAUDRATE 115200 | |
64 | ||
7f5c0157 JL |
65 | /* |
66 | * BOOTP options | |
67 | */ | |
68 | #define CONFIG_BOOTP_BOOTFILESIZE | |
69 | #define CONFIG_BOOTP_BOOTPATH | |
70 | #define CONFIG_BOOTP_GATEWAY | |
71 | #define CONFIG_BOOTP_HOSTNAME | |
72 | ||
5dc11a51 JL |
73 | /* |
74 | * Command line configuration. | |
75 | */ | |
76 | #include <config_cmd_default.h> | |
77 | ||
78 | #define CONFIG_CMD_CACHE | |
79 | #define CONFIG_CMD_REGINFO | |
80 | #define CONFIG_CMD_ELF | |
2d24a3a7 | 81 | |
2d24a3a7 | 82 | #define CONFIG_BOOTDELAY 3 |
281e00a3 | 83 | #define CONFIG_BOOTARGS "root=/dev/msdk mem=48M" |
2d24a3a7 | 84 | #define CONFIG_BOOTFILE "mx1ads" |
281e00a3 | 85 | #define CONFIG_BOOTCOMMAND "tftp; bootm" |
2d24a3a7 | 86 | |
5dc11a51 | 87 | #if defined(CONFIG_CMD_KGDB) |
2d24a3a7 WD |
88 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
89 | /* what's this ? it's not used anywhere */ | |
90 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
91 | #endif | |
92 | ||
93 | /* | |
94 | * Miscellaneous configurable options | |
95 | */ | |
49822e23 | 96 | |
6d0f6bcf | 97 | #define CONFIG_SYS_HUSH_PARSER 1 |
49822e23 | 98 | |
6d0f6bcf | 99 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
2d24a3a7 | 100 | |
6d0f6bcf JCPV |
101 | #ifdef CONFIG_SYS_HUSH_PARSER |
102 | #define CONFIG_SYS_PROMPT "MX1ADS$ " /* Monitor Command Prompt */ | |
2d24a3a7 | 103 | #else |
6d0f6bcf | 104 | #define CONFIG_SYS_PROMPT "MX1ADS=> " /* Monitor Command Prompt */ |
2d24a3a7 WD |
105 | #endif |
106 | ||
6d0f6bcf JCPV |
107 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
108 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
2d24a3a7 | 109 | /* Print Buffer Size */ |
6d0f6bcf JCPV |
110 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
111 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
2d24a3a7 | 112 | |
6d0f6bcf JCPV |
113 | #define CONFIG_SYS_MEMTEST_START 0x09000000 /* memtest works on */ |
114 | #define CONFIG_SYS_MEMTEST_END 0x0AF00000 /* 63 MB in DRAM */ | |
2d24a3a7 | 115 | |
6d0f6bcf JCPV |
116 | #define CONFIG_SYS_LOAD_ADDR 0x08800000 /* default load address */ |
117 | /*#define CONFIG_SYS_HZ 1000 */ | |
118 | #define CONFIG_SYS_HZ 3686400 | |
119 | #define CONFIG_SYS_CPUSPEED 0x141 | |
2d24a3a7 | 120 | |
2d24a3a7 WD |
121 | /*----------------------------------------------------------------------- |
122 | * Physical Memory Map | |
123 | */ | |
49822e23 | 124 | |
281e00a3 WD |
125 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SDRAM */ |
126 | #define PHYS_SDRAM_1 0x08000000 /* SDRAM on CSD0 */ | |
127 | #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ | |
2d24a3a7 | 128 | |
e845f900 FE |
129 | #define CONFIG_SYS_TEXT_BASE 0x10000000 |
130 | ||
131 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
132 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00300000 | |
133 | #define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF | |
134 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ | |
135 | GENERATED_GBL_DATA_SIZE) | |
136 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
137 | CONFIG_SYS_GBL_DATA_OFFSET) | |
138 | ||
6d0f6bcf JCPV |
139 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* 1 bank of SyncFlash */ |
140 | #define CONFIG_SYS_FLASH_BASE 0x0C000000 /* SyncFlash on CSD1 */ | |
281e00a3 | 141 | #define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */ |
2d24a3a7 WD |
142 | |
143 | /*----------------------------------------------------------------------- | |
144 | * FLASH and environment organization | |
145 | */ | |
146 | ||
2d24a3a7 WD |
147 | #define CONFIG_SYNCFLASH 1 |
148 | #define PHYS_FLASH_SIZE 0x01000000 | |
6d0f6bcf JCPV |
149 | #define CONFIG_SYS_MAX_FLASH_SECT (16) |
150 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+0x00ff8000) | |
49822e23 | 151 | |
5a1aceb0 | 152 | #define CONFIG_ENV_IS_IN_FLASH 1 |
0e8d1586 JCPV |
153 | #define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ |
154 | #define CONFIG_ENV_SECT_SIZE 0x100000 | |
281e00a3 WD |
155 | |
156 | /*----------------------------------------------------------------------- | |
157 | * Enable passing ATAGS | |
158 | */ | |
159 | ||
160 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
161 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
162 | ||
163 | #define CONFIG_SYS_CLK_FREQ 16780000 | |
164 | #define CONFIG_SYSPLL_CLK_FREQ 16000000 | |
165 | ||
2d24a3a7 | 166 | #endif /* __CONFIG_H */ |