[people/ms/u-boot.git] / include / configs / mx28evk.h

/*
 * (C) Copyright 2011 Freescale Semiconductor, Inc.
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 *
 * Based on m28evk.h:
 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
 * on behalf of DENX Software Engineering GmbH
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 */
#ifndef __MX28EVK_CONFIG_H__
#define __MX28EVK_CONFIG_H__

/*
 * SoC configurations
 */
#define CONFIG_MX28				/* i.MX28 SoC */

#define CONFIG_MXS_GPIO			/* GPIO control */
#define CONFIG_SYS_HZ		1000		/* Ticks per second */

#define CONFIG_MACH_TYPE	MACH_TYPE_MX28EVK

#include <asm/arch/regs-base.h>

#define CONFIG_SYS_NO_FLASH
#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_ARCH_MISC_INIT

/*
 * SPL
 */
#define CONFIG_SPL
#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
#define CONFIG_SPL_START_S_PATH	"arch/arm/cpu/arm926ejs/mxs"
#define CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_GPIO_SUPPORT

/*
 * U-Boot Commands
 */
#include <config_cmd_default.h>
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DOS_PARTITION

#define CONFIG_CMD_CACHE
#define CONFIG_CMD_DATE
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_GPIO
#define CONFIG_CMD_MII
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_NFS
#define CONFIG_CMD_PING
#define CONFIG_CMD_SETEXPR
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
#define CONFIG_CMD_USB
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_I2C

/*
 * Memory configurations
 */
#define CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
#define PHYS_SDRAM_1			0x40000000	/* Base address */
#define PHYS_SDRAM_1_SIZE		0x40000000	/* Max 1 GB RAM */
#define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
/* Point initial SP in SRAM so SPL can use it too. */

#define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
#define CONFIG_SYS_INIT_RAM_SIZE	(128 * 1024)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/*
 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
 * binary. In case there was more of this mess, 0x100 bytes are skipped.
 */
#define CONFIG_SYS_TEXT_BASE	0x40000100

#define CONFIG_ENV_OVERWRITE
/*
 * U-Boot general configurations
 */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_PROMPT	"MX28EVK U-Boot > "
#define CONFIG_SYS_CBSIZE	1024		/* Console I/O buffer size */
#define CONFIG_SYS_PBSIZE	\
	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
						/* Print buffer size */
#define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
#define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
						/* Boot argument buffer size */
#define CONFIG_VERSION_VARIABLE	/* U-BOOT version */
#define CONFIG_AUTO_COMPLETE		/* Command auto complete */
#define CONFIG_CMDLINE_EDITING		/* Command history etc */
#define CONFIG_SYS_HUSH_PARSER

/*
 * Serial Driver
 */
#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK		24000000
#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
#define CONFIG_CONS_INDEX		0
#define CONFIG_BAUDRATE			115200	/* Default baud rate */

/*
 * DMA
 */
#define CONFIG_APBH_DMA

/*
 * MMC Driver
 */
#define CONFIG_ENV_IS_IN_MMC
#ifdef CONFIG_ENV_IS_IN_MMC
 #define CONFIG_ENV_OFFSET	(256 * 1024)
 #define CONFIG_ENV_SIZE	(16 * 1024)
 #define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#define CONFIG_CMD_SAVEENV
#ifdef	CONFIG_CMD_MMC
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_MXS_MMC
#endif

/*
 * NAND Driver
 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x60000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#endif

/*
 * Ethernet on SOC (FEC)
 */
#ifdef	CONFIG_CMD_NET
#define CONFIG_NET_MULTI
#define CONFIG_ETHPRIME	"FEC0"
#define CONFIG_FEC_MXC
#define CONFIG_FEC_MXC_MULTI
#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE	RMII
#define CONFIG_MX28_FEC_MAC_IN_OCOTP
#endif

/*
 * RTC
 */
#ifdef	CONFIG_CMD_DATE
#define	CONFIG_RTC_MXS
#endif

/*
 * USB
 */
#ifdef	CONFIG_CMD_USB
#define	CONFIG_USB_EHCI
#define	CONFIG_USB_EHCI_MXS
#define	CONFIG_EHCI_MXS_PORT 1
#define	CONFIG_EHCI_IS_TDI
#define	CONFIG_USB_STORAGE
#define	CONFIG_USB_HOST_ETHER
#define	CONFIG_USB_ETHER_ASIX
#define	CONFIG_USB_ETHER_SMSC95XX
#endif

/* I2C */
#ifdef CONFIG_CMD_I2C
#define CONFIG_I2C_MXS
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED	400000
#endif

/*
 * SPI
 */
#ifdef CONFIG_CMD_SPI
#define CONFIG_HARD_SPI
#define CONFIG_MXS_SPI
#define CONFIG_MXS_SPI_DMA_ENABLE
#define CONFIG_SPI_HALF_DUPLEX
#define CONFIG_DEFAULT_SPI_BUS		2
#define CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0

/* SPI Flash */
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SF_DEFAULT_BUS	2
#define CONFIG_SF_DEFAULT_CS	0
/* this may vary and depends on the installed chip */
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#define CONFIG_SF_DEFAULT_SPEED		24000000

/* (redundant) environemnt in SPI flash */
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE			0x1000		/* 4KB */
#define CONFIG_ENV_OFFSET		0x40000		/* 256K */
#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_ENV_SECT_SIZE		0x1000
#define CONFIG_ENV_SPI_CS		0
#define CONFIG_ENV_SPI_BUS		2
#define CONFIG_ENV_SPI_MAX_HZ		24000000
#define CONFIG_ENV_SPI_MODE		SPI_MODE_0
#endif
#endif
#endif

/*
 * Boot Linux
 */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_BOOTDELAY	1
#define CONFIG_BOOTFILE	"uImage"
#define CONFIG_LOADADDR	0x42000000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
#define CONFIG_OF_LIBFDT

/*
 * Extra Environments
 */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"update_nand_full_filename=u-boot.nand\0" \
	"update_nand_firmware_filename=u-boot.sb\0"	\
	"update_sd_firmware_filename=u-boot.sd\0" \
	"update_nand_firmware_maxsz=0x100000\0"	\
	"update_nand_stride=0x40\0"	/* MX28 datasheet ch. 12.12 */ \
	"update_nand_count=0x4\0"	/* MX28 datasheet ch. 12.12 */ \
	"update_nand_get_fcb_size="	/* Get size of FCB blocks */ \
		"nand device 0 ; " \
		"nand info ; " \
		"setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
		"setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
	"update_nand_full="		    /* Update FCB, DBBT and FW */ \
		"if tftp ${update_nand_full_filename} ; then " \
		"run update_nand_get_fcb_size ; " \
		"nand scrub -y 0x0 ${filesize} ; " \
		"nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
		"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
		"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
		"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
		"fi\0" \
	"update_nand_firmware="		/* Update only firmware */ \
		"if tftp ${update_nand_firmware_filename} ; then " \
		"run update_nand_get_fcb_size ; " \
		"setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
		"setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
		"setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
		"nand erase ${fcb_sz} ${fw_sz} ; " \
		"nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
		"nand write ${loadaddr} ${fw_off} ${filesize} ; " \
		"fi\0" \
	"update_sd_firmware="		/* Update the SD firmware partition */ \
		"if mmc rescan ; then "	\
		"if tftp ${update_sd_firmware_filename} ; then " \
		"setexpr fw_sz ${filesize} / 0x200 ; "	/* SD block size */ \
		"setexpr fw_sz ${fw_sz} + 1 ; "	\
		"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
		"fi ; "	\
		"fi\0" \
	"script=boot.scr\0"	\
	"uimage=uImage\0" \
	"console_fsl=ttyAM0\0" \
	"console_mainline=ttyAMA0\0" \
	"mmcdev=0\0" \
	"mmcpart=2\0" \
	"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
	"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript="  \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; "	\
		"source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; "	\
		"bootm\0" \
	"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
		"root=/dev/nfs " \
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs; "	\
		"dhcp ${uimage}; bootm\0"

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loaduimage; then " \
				"run mmcboot; " \
			"else run netboot; " \
			"fi; " \
		"fi; " \
	"else run netboot; fi"

#endif /* __MX28EVK_CONFIG_H__ */
Commit	Line	Data
29f75a5c FE	1	/*
	2	* (C) Copyright 2011 Freescale Semiconductor, Inc.
	3	* Author: Fabio Estevam <fabio.estevam@freescale.com>
	4	*
	5	* Based on m28evk.h:
	6	* Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
	7	* on behalf of DENX Software Engineering GmbH
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of
	12	* the License, or (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*/
606de8b6 OS	19	#ifndef __MX28EVK_CONFIG_H__
606de8b6 OS	20	#define __MX28EVK_CONFIG_H__
29f75a5c	21
29f75a5c FE	22	/*
	23	* SoC configurations
	24	*/
	25	#define CONFIG_MX28 /* i.MX28 SoC */
e229d445	26
29f75a5c FE	27	#define CONFIG_MXS_GPIO /* GPIO control */
	28	#define CONFIG_SYS_HZ 1000 /* Ticks per second */
	29
	30	#define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
	31
e229d445 OS	32	#include <asm/arch/regs-base.h>
e229d445 OS	33
29f75a5c	34	#define CONFIG_SYS_NO_FLASH
29f75a5c	35	#define CONFIG_BOARD_EARLY_INIT_F
29f75a5c FE	36	#define CONFIG_ARCH_MISC_INIT
	37
	38	/*
	39	* SPL
	40	*/
	41	#define CONFIG_SPL
	42	#define CONFIG_SPL_NO_CPU_SUPPORT_CODE
3a0398d7 OS	43	#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
3a0398d7 OS	44	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
29f75a5c FE	45	#define CONFIG_SPL_LIBCOMMON_SUPPORT
29f75a5c FE	46	#define CONFIG_SPL_LIBGENERIC_SUPPORT
f8c4a86b	47	#define CONFIG_SPL_GPIO_SUPPORT
29f75a5c FE	48
	49	/*
	50	* U-Boot Commands
	51	*/
	52	#include <config_cmd_default.h>
	53	#define CONFIG_DISPLAY_CPUINFO
	54	#define CONFIG_DOS_PARTITION
29f75a5c FE	55
29f75a5c FE	56	#define CONFIG_CMD_CACHE
9588d942	57	#define CONFIG_CMD_DATE
29f75a5c	58	#define CONFIG_CMD_DHCP
3b4efee9	59	#define CONFIG_CMD_FAT
29f75a5c FE	60	#define CONFIG_CMD_GPIO
	61	#define CONFIG_CMD_MII
	62	#define CONFIG_CMD_MMC
	63	#define CONFIG_CMD_NET
	64	#define CONFIG_CMD_NFS
	65	#define CONFIG_CMD_PING
7577a4b3	66	#define CONFIG_CMD_SETEXPR
ed97abed MF	67	#define CONFIG_CMD_SF
ed97abed MF	68	#define CONFIG_CMD_SPI
598aa2bb	69	#define CONFIG_CMD_USB
34990e12	70	#define CONFIG_CMD_BOOTZ
175a7d27	71	#define CONFIG_CMD_I2C
29f75a5c FE	72
	73	/*
	74	* Memory configurations
	75	*/
	76	#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
	77	#define PHYS_SDRAM_1 0x40000000 /* Base address */
	78	#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
29f75a5c FE	79	#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
	80	#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
	81	#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
	82	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	83	/* Point initial SP in SRAM so SPL can use it too. */
	84
9ed5dfa8	85	#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
29f75a5c FE	86	#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
	87
	88	#define CONFIG_SYS_INIT_SP_OFFSET \
	89	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	90	#define CONFIG_SYS_INIT_SP_ADDR \
	91	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	92
	93	/*
	94	* We need to sacrifice first 4 bytes of RAM here to avoid triggering some
	95	* strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
	96	* binary. In case there was more of this mess, 0x100 bytes are skipped.
	97	*/
	98	#define CONFIG_SYS_TEXT_BASE 0x40000100
	99
	100	#define CONFIG_ENV_OVERWRITE
	101	/*
	102	* U-Boot general configurations
	103	*/
	104	#define CONFIG_SYS_LONGHELP
	105	#define CONFIG_SYS_PROMPT "MX28EVK U-Boot > "
	106	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
	107	#define CONFIG_SYS_PBSIZE \
	108	(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	109	/* Print buffer size */
	110	#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
	111	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	112	/* Boot argument buffer size */
	113	#define CONFIG_VERSION_VARIABLE /* U-BOOT version */
	114	#define CONFIG_AUTO_COMPLETE /* Command auto complete */
	115	#define CONFIG_CMDLINE_EDITING /* Command history etc */
	116	#define CONFIG_SYS_HUSH_PARSER
29f75a5c FE	117
	118	/*
	119	* Serial Driver
	120	*/
	121	#define CONFIG_PL011_SERIAL
	122	#define CONFIG_PL011_CLOCK 24000000
	123	#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
	124	#define CONFIG_CONS_INDEX 0
	125	#define CONFIG_BAUDRATE 115200 /* Default baud rate */
29f75a5c	126
1102d8d7 AG	127	/*
	128	* DMA
	129	*/
	130	#define CONFIG_APBH_DMA
	131
29f75a5c FE	132	/*
	133	* MMC Driver
	134	*/
	135	#define CONFIG_ENV_IS_IN_MMC
ed97abed MF	136	#ifdef CONFIG_ENV_IS_IN_MMC
	137	#define CONFIG_ENV_OFFSET (256 * 1024)
	138	#define CONFIG_ENV_SIZE (16 * 1024)
	139	#define CONFIG_SYS_MMC_ENV_DEV 0
	140	#endif
29f75a5c FE	141	#define CONFIG_CMD_SAVEENV
	142	#ifdef CONFIG_CMD_MMC
	143	#define CONFIG_MMC
	144	#define CONFIG_GENERIC_MMC
6dc71c8d	145	#define CONFIG_BOUNCE_BUFFER
29f75a5c FE	146	#define CONFIG_MXS_MMC
	147	#endif
	148
ecb7be29 LH	149	/*
	150	* NAND Driver
	151	*/
	152	#ifdef CONFIG_CMD_NAND
	153	#define CONFIG_NAND_MXS
	154	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	155	#define CONFIG_SYS_NAND_BASE 0x60000000
	156	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	157	#endif
	158
29f75a5c FE	159	/*
	160	* Ethernet on SOC (FEC)
	161	*/
	162	#ifdef CONFIG_CMD_NET
	163	#define CONFIG_NET_MULTI
	164	#define CONFIG_ETHPRIME "FEC0"
	165	#define CONFIG_FEC_MXC
	166	#define CONFIG_FEC_MXC_MULTI
	167	#define CONFIG_MII
29f75a5c FE	168	#define CONFIG_FEC_XCV_TYPE RMII
	169	#define CONFIG_MX28_FEC_MAC_IN_OCOTP
	170	#endif
	171
9588d942 MF	172	/*
	173	* RTC
	174	*/
	175	#ifdef CONFIG_CMD_DATE
	176	#define CONFIG_RTC_MXS
	177	#endif
	178
598aa2bb MF	179	/*
	180	* USB
	181	*/
	182	#ifdef CONFIG_CMD_USB
	183	#define CONFIG_USB_EHCI
	184	#define CONFIG_USB_EHCI_MXS
	185	#define CONFIG_EHCI_MXS_PORT 1
	186	#define CONFIG_EHCI_IS_TDI
	187	#define CONFIG_USB_STORAGE
91dd7ca6 FE	188	#define CONFIG_USB_HOST_ETHER
	189	#define CONFIG_USB_ETHER_ASIX
	190	#define CONFIG_USB_ETHER_SMSC95XX
598aa2bb MF	191	#endif
598aa2bb MF	192
175a7d27 FE	193	/* I2C */
	194	#ifdef CONFIG_CMD_I2C
	195	#define CONFIG_I2C_MXS
	196	#define CONFIG_HARD_I2C
	197	#define CONFIG_SYS_I2C_SPEED 400000
	198	#endif
	199
ed97abed MF	200	/*
	201	* SPI
	202	*/
	203	#ifdef CONFIG_CMD_SPI
	204	#define CONFIG_HARD_SPI
	205	#define CONFIG_MXS_SPI
de6dc4ea	206	#define CONFIG_MXS_SPI_DMA_ENABLE
ed97abed MF	207	#define CONFIG_SPI_HALF_DUPLEX
	208	#define CONFIG_DEFAULT_SPI_BUS 2
	209	#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
	210
	211	/* SPI Flash */
	212	#ifdef CONFIG_CMD_SF
	213	#define CONFIG_SPI_FLASH
1fc3bbd1 FE	214	#define CONFIG_SF_DEFAULT_BUS 2
1fc3bbd1 FE	215	#define CONFIG_SF_DEFAULT_CS 0
ed97abed MF	216	/* this may vary and depends on the installed chip */
	217	#define CONFIG_SPI_FLASH_SST
	218	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	219	#define CONFIG_SF_DEFAULT_SPEED 24000000
	220
	221	/* (redundant) environemnt in SPI flash */
ed97abed MF	222	#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
	223	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	224	#define CONFIG_ENV_SIZE 0x1000 /* 4KB */
	225	#define CONFIG_ENV_OFFSET 0x40000 /* 256K */
	226	#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
	227	#define CONFIG_ENV_SECT_SIZE 0x1000
	228	#define CONFIG_ENV_SPI_CS 0
	229	#define CONFIG_ENV_SPI_BUS 2
	230	#define CONFIG_ENV_SPI_MAX_HZ 24000000
	231	#define CONFIG_ENV_SPI_MODE SPI_MODE_0
	232	#endif
	233	#endif
	234	#endif
	235
29f75a5c FE	236	/*
	237	* Boot Linux
	238	*/
	239	#define CONFIG_CMDLINE_TAG
	240	#define CONFIG_SETUP_MEMORY_TAGS
27856943	241	#define CONFIG_BOOTDELAY 1
29f75a5c	242	#define CONFIG_BOOTFILE "uImage"
29f75a5c FE	243	#define CONFIG_LOADADDR 0x42000000
29f75a5c FE	244	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
e310016b	245	#define CONFIG_OF_LIBFDT
29f75a5c FE	246
	247	/*
	248	* Extra Environments
	249	*/
	250	#define CONFIG_EXTRA_ENV_SETTINGS \
f994dc5e OS	251	"update_nand_full_filename=u-boot.nand\0" \
	252	"update_nand_firmware_filename=u-boot.sb\0" \
	253	"update_sd_firmware_filename=u-boot.sd\0" \
	254	"update_nand_firmware_maxsz=0x100000\0" \
	255	"update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
	256	"update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
	257	"update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
	258	"nand device 0 ; " \
	259	"nand info ; " \
	260	"setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
	261	"setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
	262	"update_nand_full=" /* Update FCB, DBBT and FW */ \
	263	"if tftp ${update_nand_full_filename} ; then " \
	264	"run update_nand_get_fcb_size ; " \
	265	"nand scrub -y 0x0 ${filesize} ; " \
71779d5b	266	"nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
f994dc5e OS	267	"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
	268	"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
	269	"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
	270	"fi\0" \
	271	"update_nand_firmware=" /* Update only firmware */ \
	272	"if tftp ${update_nand_firmware_filename} ; then " \
	273	"run update_nand_get_fcb_size ; " \
	274	"setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
	275	"setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
	276	"setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
	277	"nand erase ${fcb_sz} ${fw_sz} ; " \
	278	"nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
	279	"nand write ${loadaddr} ${fw_off} ${filesize} ; " \
	280	"fi\0" \
	281	"update_sd_firmware=" /* Update the SD firmware partition */ \
	282	"if mmc rescan ; then " \
	283	"if tftp ${update_sd_firmware_filename} ; then " \
	284	"setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
	285	"setexpr fw_sz ${fw_sz} + 1 ; " \
	286	"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
	287	"fi ; " \
	288	"fi\0" \
	289	"script=boot.scr\0" \
	290	"uimage=uImage\0" \
	291	"console_fsl=ttyAM0\0" \
	292	"console_mainline=ttyAMA0\0" \
	293	"mmcdev=0\0" \
	294	"mmcpart=2\0" \
3c41e901	295	"mmcroot=/dev/mmcblk0p3 rw rootwait\0" \
f994dc5e	296	"mmcargs=setenv bootargs console=${console_mainline},${baudrate} " \
3c41e901	297	"root=${mmcroot}\0" \
f994dc5e OS	298	"loadbootscript=" \
	299	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	300	"bootscript=echo Running bootscript from mmc ...; " \
	301	"source\0" \
	302	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	303	"mmcboot=echo Booting from mmc ...; " \
	304	"run mmcargs; " \
	305	"bootm\0" \
	306	"netargs=setenv bootargs console=${console_mainline},${baudrate} " \
29f75a5c	307	"root=/dev/nfs " \
f994dc5e OS	308	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	309	"netboot=echo Booting from net ...; " \
	310	"run netargs; " \
	311	"dhcp ${uimage}; bootm\0"
	312
	313	#define CONFIG_BOOTCOMMAND \
66968110	314	"mmc dev ${mmcdev}; if mmc rescan; then " \
f994dc5e OS	315	"if run loadbootscript; then " \
	316	"run bootscript; " \
	317	"else " \
	318	"if run loaduimage; then " \
	319	"run mmcboot; " \
	320	"else run netboot; " \
	321	"fi; " \
	322	"fi; " \
	323	"else run netboot; fi"
29f75a5c	324
606de8b6	325	#endif /* __MX28EVK_CONFIG_H__ */