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8449f287 ML |
1 | /* |
2 | * (C) Copyright 2008 Magnus Lilja <lilja.magnus@gmail.com> | |
3 | * | |
4 | * (C) Copyright 2004 | |
5 | * Texas Instruments. | |
6 | * Richard Woodruff <r-woodruff2@ti.com> | |
7 | * Kshitij Gupta <kshitij@ti.com> | |
8 | * | |
9 | * Configuration settings for the Freescale i.MX31 PDK board. | |
10 | * | |
11 | * See file CREDITS for list of people who contributed to this | |
12 | * project. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License as | |
16 | * published by the Free Software Foundation; either version 2 of | |
17 | * the License, or (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
27 | * MA 02111-1307 USA | |
28 | */ | |
29 | ||
30 | #ifndef __CONFIG_H | |
31 | #define __CONFIG_H | |
32 | ||
33 | /* High Level Configuration Options */ | |
34 | #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ | |
35 | #define CONFIG_MX31 1 /* in a mx31 */ | |
36 | #define CONFIG_MX31_HCLK_FREQ 26000000 | |
37 | #define CONFIG_MX31_CLK32 32768 | |
38 | ||
39 | #define CONFIG_DISPLAY_CPUINFO | |
40 | #define CONFIG_DISPLAY_BOARDINFO | |
41 | ||
42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
43 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
44 | #define CONFIG_INITRD_TAG 1 | |
45 | ||
46 | /* No support for NAND boot for i.MX31 PDK yet, so we rely on some other | |
47 | * program to initialize the SDRAM. | |
48 | */ | |
49 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
50 | ||
51 | /* | |
52 | * Size of malloc() pool | |
53 | */ | |
54 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) | |
55 | /* Bytes reserved for initial data */ | |
56 | #define CONFIG_SYS_GBL_DATA_SIZE 128 | |
57 | ||
58 | /* | |
59 | * Hardware drivers | |
60 | */ | |
61 | ||
62 | #define CONFIG_MXC_UART 1 | |
63 | #define CONFIG_SYS_MX31_UART1 1 | |
64 | ||
65 | #define CONFIG_HARD_SPI 1 | |
66 | #define CONFIG_MXC_SPI 1 | |
67 | #define CONFIG_DEFAULT_SPI_BUS 1 | |
68 | #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_2 | SPI_CS_HIGH) | |
69 | ||
70 | #define CONFIG_RTC_MC13783 1 | |
71 | ||
72 | /* MC13783 connected to CSPI2 and SS2 */ | |
73 | #define CONFIG_MC13783_SPI_BUS 1 | |
74 | #define CONFIG_MC13783_SPI_CS 2 | |
75 | ||
76 | /* allow to overwrite serial and ethaddr */ | |
77 | #define CONFIG_ENV_OVERWRITE | |
78 | #define CONFIG_CONS_INDEX 1 | |
79 | #define CONFIG_BAUDRATE 115200 | |
80 | #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} | |
81 | ||
82 | /*********************************************************** | |
83 | * Command definition | |
84 | ***********************************************************/ | |
85 | ||
86 | #include <config_cmd_default.h> | |
87 | ||
88 | #define CONFIG_CMD_MII | |
89 | #define CONFIG_CMD_PING | |
90 | #define CONFIG_CMD_SPI | |
91 | #define CONFIG_CMD_DATE | |
92 | ||
93 | /* | |
94 | * Disabled due to compilation errors in cmd_bootm.c (IMLS seems to require | |
95 | * that CFG_NO_FLASH is undefined). | |
96 | */ | |
97 | #undef CONFIG_CMD_IMLS | |
98 | ||
99 | #define CONFIG_BOOTDELAY 3 | |
100 | ||
101 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
102 | "bootargs_base=setenv bootargs console=ttymxc0,115200\0" \ | |
103 | "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \ | |
104 | "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ | |
105 | "bootcmd=run bootcmd_net\0" \ | |
106 | "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; " \ | |
107 | "tftpboot 0x81000000 uImage-mx31; bootm\0" | |
108 | ||
109 | #define CONFIG_DRIVER_SMC911X 1 | |
110 | #define CONFIG_DRIVER_SMC911X_BASE 0xB6000000 | |
111 | #define CONFIG_DRIVER_SMC911X_32_BIT 1 | |
112 | ||
113 | /* | |
114 | * Miscellaneous configurable options | |
115 | */ | |
116 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
117 | #define CONFIG_SYS_PROMPT "uboot> " | |
118 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
119 | /* Print Buffer Size */ | |
120 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
121 | sizeof(CONFIG_SYS_PROMPT)+16) | |
122 | /* max number of command args */ | |
123 | #define CONFIG_SYS_MAXARGS 16 | |
124 | /* Boot Argument Buffer Size */ | |
125 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
126 | ||
127 | /* memtest works on */ | |
128 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
129 | #define CONFIG_SYS_MEMTEST_END 0x10000 | |
130 | ||
131 | /* default load address */ | |
132 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 | |
133 | ||
134 | #define CONFIG_SYS_HZ 1000 | |
135 | ||
136 | #define CONFIG_CMDLINE_EDITING 1 | |
137 | ||
138 | /*----------------------------------------------------------------------- | |
139 | * Stack sizes | |
140 | * | |
141 | * The stack sizes are set up in start.S using the settings below | |
142 | */ | |
143 | #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */ | |
144 | ||
145 | /*----------------------------------------------------------------------- | |
146 | * Physical Memory Map | |
147 | */ | |
148 | #define CONFIG_NR_DRAM_BANKS 1 | |
149 | #define PHYS_SDRAM_1 CSD0_BASE | |
150 | #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) | |
151 | ||
152 | /*----------------------------------------------------------------------- | |
153 | * FLASH and environment organization | |
154 | */ | |
155 | /* No NOR flash present */ | |
156 | #define CONFIG_SYS_NO_FLASH 1 | |
157 | ||
158 | #define CONFIG_ENV_IS_NOWHERE 1 | |
159 | ||
160 | #define CONFIG_ENV_SIZE (128 * 1024) | |
161 | ||
162 | #endif /* __CONFIG_H */ |