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net: Move the CMD_NET config to defconfigs
[people/ms/u-boot.git] / include / configs / mx51_efikamx.h
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1/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
3765b3e7 8 * SPDX-License-Identifier: GPL-2.0+
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9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <config_cmd_default.h>
15
16/*
17 * High Level Board Configuration Options
18 */
19/* An i.MX51 CPU */
20#define CONFIG_MX51
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21
22#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
23#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
24
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25#include <asm/arch/imx-regs.h>
26
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27#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
29
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30#define CONFIG_SYS_TEXT_BASE 0x97800000
31
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32#define CONFIG_SYS_ICACHE_OFF
33#define CONFIG_SYS_DCACHE_OFF
34
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35/*
36 * Bootloader Components Configuration
37 */
38#define CONFIG_CMD_SPI
39#define CONFIG_CMD_SF
40#define CONFIG_CMD_MMC
41#define CONFIG_CMD_FAT
4e0499eb 42#define CONFIG_CMD_EXT2
d5914017 43#define CONFIG_CMD_IDE
d98d8bc1 44#define CONFIG_CMD_DATE
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45#undef CONFIG_CMD_IMLS
46
47/*
48 * Environmental settings
49 */
50
51#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
52#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
53#define CONFIG_ENV_SIZE (4 * 1024)
54
55/*
56 * ATAG setup
57 */
58#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
59#define CONFIG_REVISION_TAG
60#define CONFIG_SETUP_MEMORY_TAGS
61#define CONFIG_INITRD_TAG
62
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63#define CONFIG_OF_LIBFDT 1
64
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65/*
66 * Size of malloc() pool
67 */
68#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
69
70#define CONFIG_BOARD_EARLY_INIT_F
9660e442 71#define CONFIG_BOARD_LATE_INIT
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72
73/*
74 * Hardware drivers
75 */
76#define CONFIG_MXC_UART
40f6fffe 77#define CONFIG_MXC_UART_BASE UART1_BASE
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78#define CONFIG_CONS_INDEX 1
79#define CONFIG_BAUDRATE 115200
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80
81#define CONFIG_MXC_GPIO
82
83/*
84 * SPI Interface
85 */
86#ifdef CONFIG_CMD_SPI
87
88#define CONFIG_HARD_SPI
89#define CONFIG_MXC_SPI
90#define CONFIG_DEFAULT_SPI_BUS 1
91#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
92
93/* SPI FLASH */
94#ifdef CONFIG_CMD_SF
95
96#define CONFIG_SPI_FLASH
97#define CONFIG_SPI_FLASH_SST
155fa9af 98#define CONFIG_SF_DEFAULT_CS 1
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99#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
100#define CONFIG_SF_DEFAULT_SPEED 25000000
101
155fa9af 102#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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103#define CONFIG_ENV_SPI_BUS 0
104#define CONFIG_ENV_SPI_MAX_HZ 25000000
105#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
106#define CONFIG_FSL_ENV_IN_SF
107#define CONFIG_ENV_IS_IN_SPI_FLASH
108#define CONFIG_SYS_NO_FLASH
109
110#else
111#define CONFIG_ENV_IS_NOWHERE
112#endif
113
114/* SPI PMIC */
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115#define CONFIG_POWER
116#define CONFIG_POWER_SPI
117#define CONFIG_POWER_FSL
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118#define CONFIG_FSL_PMIC_BUS 0
119#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
120#define CONFIG_FSL_PMIC_CLK 25000000
121#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
9c38f7df 122#define CONFIG_FSL_PMIC_BITLEN 32
4e8b7544 123#define CONFIG_RTC_MC13XXX
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124#endif
125
126/*
127 * MMC Configs
128 */
129#ifdef CONFIG_CMD_MMC
130#define CONFIG_MMC
131#define CONFIG_GENERIC_MMC
132#define CONFIG_FSL_ESDHC
133#define CONFIG_SYS_FSL_ESDHC_ADDR 0
134#define CONFIG_SYS_FSL_ESDHC_NUM 2
135#endif
136
137/*
138 * ATA/IDE
139 */
140#ifdef CONFIG_CMD_IDE
141#define CONFIG_LBA48
142#undef CONFIG_IDE_LED
143#undef CONFIG_IDE_RESET
144
145#define CONFIG_MX51_PATA
146
147#define __io
148
149#define CONFIG_SYS_IDE_MAXBUS 1
150#define CONFIG_SYS_IDE_MAXDEVICE 1
151
152#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
153#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
154
155#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
156#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
157#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
158
159#define CONFIG_SYS_ATA_STRIDE 4
160
161#define CONFIG_IDE_PREINIT
162#define CONFIG_MXC_ATA_PIO_MODE 4
163#endif
164
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165/*
166 * USB
167 */
168#define CONFIG_CMD_USB
169#ifdef CONFIG_CMD_USB
170#define CONFIG_USB_EHCI /* Enable EHCI USB support */
171#define CONFIG_USB_EHCI_MX5
172#define CONFIG_USB_ULPI
173#define CONFIG_USB_ULPI_VIEWPORT
174#define CONFIG_MXC_USB_PORT 1
175#if (CONFIG_MXC_USB_PORT == 0)
176#define CONFIG_MXC_USB_PORTSC (1 << 28)
177#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
178#else
179#define CONFIG_MXC_USB_PORTSC (2 << 30)
180#define CONFIG_MXC_USB_FLAGS 0
181#endif
182#define CONFIG_EHCI_IS_TDI
183#define CONFIG_USB_STORAGE
184#define CONFIG_USB_HOST_ETHER
185#define CONFIG_USB_KEYBOARD
186#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
187#define CONFIG_PREBOOT
188/* USB NET */
189#ifdef CONFIG_CMD_NET
190#define CONFIG_USB_ETHER_ASIX
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191#define CONFIG_CMD_PING
192#define CONFIG_CMD_DHCP
193#endif
194#endif /* CONFIG_CMD_USB */
195
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196/*
197 * Filesystems
198 */
199#ifdef CONFIG_CMD_FAT
200#define CONFIG_DOS_PARTITION
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201#ifdef CONFIG_CMD_NET
202#define CONFIG_CMD_NFS
203#endif
d5914017 204#endif
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205
206/*
207 * Miscellaneous configurable options
208 */
209#define CONFIG_ENV_OVERWRITE
210#define CONFIG_BOOTDELAY 3
211#define CONFIG_LOADADDR 0x90800000
212
213#define CONFIG_SYS_LONGHELP /* undef to save memory */
214#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
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215#define CONFIG_SYS_PROMPT "Efika> "
216#define CONFIG_AUTO_COMPLETE
217#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
218/* Print Buffer Size */
219#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
220#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
221#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
222
223#define CONFIG_SYS_MEMTEST_START 0x90000000
f361a5c0 224#define CONFIG_SYS_MEMTEST_END 0x90010000
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225
226#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
227
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228#define CONFIG_CMDLINE_EDITING
229
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230/*-----------------------------------------------------------------------
231 * Physical Memory Map
232 */
233#define CONFIG_NR_DRAM_BANKS 1
234#define PHYS_SDRAM_1 CSD0_BASE_ADDR
235#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
236
237#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
238#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
239#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
240
241#define CONFIG_SYS_INIT_SP_OFFSET \
242 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
243#define CONFIG_SYS_INIT_SP_ADDR \
244 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
245
246#define CONFIG_SYS_DDR_CLKSEL 0
b7171d92 247#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
39e85761 248#define CONFIG_SYS_MAIN_PWR_ON
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249
250#endif