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c5fb70c9 SB |
1 | /* |
2 | * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> | |
3 | * | |
4 | * (C) Copyright 2009 Freescale Semiconductor, Inc. | |
5 | * | |
6 | * Configuration settings for the MX51EVK Board | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
c5fb70c9 SB |
9 | */ |
10 | ||
11 | #ifndef __CONFIG_H | |
12 | #define __CONFIG_H | |
13 | ||
c5fb70c9 SB |
14 | /* High Level Configuration Options */ |
15 | ||
18fb0e3c | 16 | #define CONFIG_SYS_FSL_CLK |
c7bdcb61 SB |
17 | #define CONFIG_SYS_TEXT_BASE 0x97800000 |
18 | ||
595f3e56 | 19 | #include <asm/arch/imx-regs.h> |
c5fb70c9 | 20 | |
4f521418 | 21 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
4f521418 FE |
22 | #define CONFIG_SETUP_MEMORY_TAGS |
23 | #define CONFIG_INITRD_TAG | |
362635bd | 24 | #define CONFIG_REVISION_TAG |
c5fb70c9 | 25 | |
4cd300ef | 26 | #define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE |
c5fb70c9 SB |
27 | /* |
28 | * Size of malloc() pool | |
29 | */ | |
f1adefd2 | 30 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
c5fb70c9 SB |
31 | |
32 | /* | |
33 | * Hardware drivers | |
34 | */ | |
f6bfd29b | 35 | #define CONFIG_FSL_IIM |
f6bfd29b | 36 | |
c5fb70c9 | 37 | #define CONFIG_MXC_UART |
40f6fffe | 38 | #define CONFIG_MXC_UART_BASE UART1_BASE |
753fc2eb | 39 | #define CONFIG_MXC_GPIO |
c5fb70c9 | 40 | |
b4377e12 SB |
41 | /* |
42 | * SPI Configs | |
43 | * */ | |
b4377e12 SB |
44 | |
45 | #define CONFIG_MXC_SPI | |
46 | ||
5357265a | 47 | /* PMIC Controller */ |
be3b51aa ŁM |
48 | #define CONFIG_POWER |
49 | #define CONFIG_POWER_SPI | |
50 | #define CONFIG_POWER_FSL | |
b4377e12 SB |
51 | #define CONFIG_FSL_PMIC_BUS 0 |
52 | #define CONFIG_FSL_PMIC_CS 0 | |
53 | #define CONFIG_FSL_PMIC_CLK 2500000 | |
9f481e95 | 54 | #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) |
5357265a | 55 | #define CONFIG_FSL_PMIC_BITLEN 32 |
9b6ede92 | 56 | #define CONFIG_RTC_MC13XXX |
b4377e12 | 57 | |
c5fb70c9 SB |
58 | /* |
59 | * MMC Configs | |
60 | * */ | |
61 | #define CONFIG_FSL_ESDHC | |
9992792b | 62 | #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR |
c5fb70c9 SB |
63 | #define CONFIG_SYS_FSL_ESDHC_NUM 2 |
64 | ||
c5fb70c9 SB |
65 | /* |
66 | * Eth Configs | |
67 | */ | |
c5fb70c9 | 68 | #define CONFIG_MII |
c5fb70c9 SB |
69 | |
70 | #define CONFIG_FEC_MXC | |
71 | #define IMX_FEC_BASE FEC_BASE_ADDR | |
72 | #define CONFIG_FEC_MXC_PHYADDR 0x1F | |
73 | ||
055d9693 | 74 | /* USB Configs */ |
055d9693 | 75 | #define CONFIG_USB_EHCI_MX5 |
055d9693 WG |
76 | #define CONFIG_USB_ETHER_ASIX |
77 | #define CONFIG_USB_ETHER_SMSC95XX | |
78 | #define CONFIG_MXC_USB_PORT 1 | |
79 | #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI | |
80 | #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED | |
81 | ||
f1adefd2 FE |
82 | /* Framebuffer and LCD */ |
83 | #define CONFIG_PREBOOT | |
695af9ab | 84 | #define CONFIG_VIDEO_IPUV3 |
f1adefd2 FE |
85 | #define CONFIG_VIDEO_BMP_RLE8 |
86 | #define CONFIG_SPLASH_SCREEN | |
87 | #define CONFIG_BMP_16BPP | |
88 | #define CONFIG_VIDEO_LOGO | |
9fbdb1aa | 89 | #define CONFIG_IPUV3_CLK 133000000 |
f1adefd2 | 90 | |
c5fb70c9 SB |
91 | /* allow to overwrite serial and ethaddr */ |
92 | #define CONFIG_ENV_OVERWRITE | |
93 | #define CONFIG_CONS_INDEX 1 | |
c5fb70c9 | 94 | |
28b119e9 | 95 | #define CONFIG_ETHPRIME "FEC0" |
c5fb70c9 | 96 | |
94b5f3ed | 97 | #define CONFIG_LOADADDR 0x92000000 /* loadaddr env var */ |
c5fb70c9 | 98 | |
06982534 SG |
99 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
100 | "script=boot.scr\0" \ | |
20f233bb | 101 | "image=zImage\0" \ |
94b5f3ed FE |
102 | "fdt_file=imx51-babbage.dtb\0" \ |
103 | "fdt_addr=0x91000000\0" \ | |
104 | "boot_fdt=try\0" \ | |
105 | "ip_dyn=yes\0" \ | |
06982534 | 106 | "mmcdev=0\0" \ |
e97721c4 OS |
107 | "mmcpart=1\0" \ |
108 | "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \ | |
06982534 | 109 | "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ |
0bc32d91 | 110 | "root=${mmcroot}\0" \ |
06982534 SG |
111 | "loadbootscript=" \ |
112 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
113 | "bootscript=echo Running bootscript from mmc ...; " \ | |
114 | "source\0" \ | |
20f233bb | 115 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
94b5f3ed | 116 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
06982534 SG |
117 | "mmcboot=echo Booting from mmc ...; " \ |
118 | "run mmcargs; " \ | |
94b5f3ed FE |
119 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
120 | "if run loadfdt; then " \ | |
20f233bb | 121 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
94b5f3ed FE |
122 | "else " \ |
123 | "if test ${boot_fdt} = try; then " \ | |
20f233bb | 124 | "bootz; " \ |
94b5f3ed FE |
125 | "else " \ |
126 | "echo WARN: Cannot load the DT; " \ | |
127 | "fi; " \ | |
128 | "fi; " \ | |
129 | "else " \ | |
20f233bb | 130 | "bootz; " \ |
94b5f3ed | 131 | "fi;\0" \ |
06982534 SG |
132 | "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ |
133 | "root=/dev/nfs " \ | |
134 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
135 | "netboot=echo Booting from net ...; " \ | |
136 | "run netargs; " \ | |
94b5f3ed FE |
137 | "if test ${ip_dyn} = yes; then " \ |
138 | "setenv get_cmd dhcp; " \ | |
139 | "else " \ | |
140 | "setenv get_cmd tftp; " \ | |
141 | "fi; " \ | |
20f233bb | 142 | "${get_cmd} ${image}; " \ |
94b5f3ed FE |
143 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
144 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
20f233bb | 145 | "bootz ${loadaddr} - ${fdt_addr}; " \ |
94b5f3ed FE |
146 | "else " \ |
147 | "if test ${boot_fdt} = try; then " \ | |
20f233bb | 148 | "bootz; " \ |
94b5f3ed FE |
149 | "else " \ |
150 | "echo ERROR: Cannot load the DT; " \ | |
151 | "exit; " \ | |
152 | "fi; " \ | |
153 | "fi; " \ | |
154 | "else " \ | |
20f233bb | 155 | "bootz; " \ |
94b5f3ed | 156 | "fi;\0" |
06982534 SG |
157 | |
158 | #define CONFIG_BOOTCOMMAND \ | |
66968110 | 159 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
06982534 SG |
160 | "if run loadbootscript; then " \ |
161 | "run bootscript; " \ | |
162 | "else " \ | |
20f233bb | 163 | "if run loadimage; then " \ |
06982534 SG |
164 | "run mmcboot; " \ |
165 | "else run netboot; " \ | |
166 | "fi; " \ | |
167 | "fi; " \ | |
168 | "else run netboot; fi" | |
c5fb70c9 SB |
169 | |
170 | #define CONFIG_ARP_TIMEOUT 200UL | |
171 | ||
172 | /* | |
173 | * Miscellaneous configurable options | |
174 | */ | |
175 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
c5fb70c9 | 176 | #define CONFIG_AUTO_COMPLETE |
c5fb70c9 SB |
177 | |
178 | #define CONFIG_SYS_MEMTEST_START 0x90000000 | |
0bd14dea | 179 | #define CONFIG_SYS_MEMTEST_END 0x90010000 |
c5fb70c9 SB |
180 | |
181 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
182 | ||
c5fb70c9 SB |
183 | #define CONFIG_CMDLINE_EDITING |
184 | ||
c5fb70c9 SB |
185 | /*----------------------------------------------------------------------- |
186 | * Physical Memory Map | |
187 | */ | |
188 | #define CONFIG_NR_DRAM_BANKS 1 | |
189 | #define PHYS_SDRAM_1 CSD0_BASE_ADDR | |
190 | #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) | |
191 | ||
1ab027cb SG |
192 | #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) |
193 | #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) | |
194 | #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) | |
195 | ||
196 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
197 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
198 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
199 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
200 | ||
5e1fe88f SB |
201 | #define CONFIG_SYS_DDR_CLKSEL 0 |
202 | #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 | |
39e85761 | 203 | #define CONFIG_SYS_MAIN_PWR_ON |
5e1fe88f | 204 | |
c5fb70c9 | 205 | /*----------------------------------------------------------------------- |
e856bdcf | 206 | * environment organization |
c5fb70c9 | 207 | */ |
a676cca4 JL |
208 | #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
209 | #define CONFIG_ENV_SIZE (8 * 1024) | |
a676cca4 | 210 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
c5fb70c9 SB |
211 | |
212 | #endif |