[people/ms/u-boot.git] / include / configs / mx53cx9020.h

/*
 * Copyright (C) 2015  Beckhoff Automation GmbH & Co. KG
 * Patrick Bruenn <p.bruenn@beckhoff.com>
 *
 * Configuration settings for Beckhoff CX9020.
 *
 * Based on Freescale's Linux i.MX mx53loco.h file:
 * Copyright (C) 2010-2011 Freescale Semiconductor.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/arch/imx-regs.h>

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG

#define CONFIG_SYS_FSL_CLK

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)

#define CONFIG_MXC_GPIO
#define CONFIG_REVISION_TAG

#define CONFIG_MXC_UART_BASE UART2_BASE

#define CONFIG_FPGA_COUNT 1

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	2

/* bootz: zImage/initrd.img support */

/* Eth Configs */
#define CONFIG_MII
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_ETHPRIME		"FEC0"
#define CONFIG_FEC_MXC_PHYADDR	0x1F

/* USB Configs */
#define CONFIG_USB_EHCI_MX5
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX		1

/* Command definition */
#define CONFIG_SUPPORT_RAW_INITRD

#define CONFIG_LOADADDR		0x70010000	/* loadaddr env var */
#define CONFIG_SYS_TEXT_BASE    0x77800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"fdt_addr_r=0x71ff0000\0" \
	"pxefile_addr_r=0x73000000\0" \
	"ramdisk_addr_r=0x72000000\0" \
	"console=ttymxc1,115200\0" \
	"uenv=/boot/uEnv.txt\0" \
	"optargs=\0" \
	"cmdline=\0" \
	"mmcdev=0\0" \
	"mmcpart=1\0" \
	"mmcrootfstype=ext4 rootwait fixrtc\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
		"rootfstype=${mmcrootfstype} " \
		"${cmdline}\0" \
	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
	"loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
		"setenv rdsize ${filesize}\0" \
	"loadfdt=echo loading ${fdt_path} ...;" \
		"load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
	"mmcboot=mmc dev ${mmcdev}; " \
		"if mmc rescan; then " \
			"echo SD/MMC found on device ${mmcdev};" \
			"echo Checking for: ${uenv} ...;" \
			"setenv bootpart ${mmcdev}:${mmcpart};" \
			"if test -e mmc ${bootpart} ${uenv}; then " \
				"load mmc ${bootpart} ${loadaddr} ${uenv};" \
				"env import -t ${loadaddr} ${filesize};" \
				"echo Loaded environment from ${uenv};" \
				"if test -n ${dtb}; then " \
					"setenv fdt_file ${dtb};" \
					"echo Using: dtb=${fdt_file} ...;" \
				"fi;" \
				"echo Checking for uname_r in ${uenv}...;" \
				"if test -n ${uname_r}; then " \
					"echo Running uname_boot ...;" \
					"run uname_boot;" \
				"fi;" \
			"fi;" \
		"fi;\0" \
	"uname_boot="\
		"setenv bootdir /boot; " \
		"setenv bootfile vmlinuz-${uname_r}; " \
		"setenv ccatfile /boot/ccat.rbf; " \
		"echo loading CCAT firmware from ${ccatfile}; " \
		"load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
		"fpga load 0 ${loadaddr} ${filesize}; " \
		"if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
			"echo loading ${bootdir}/${bootfile} ...; " \
			"run loadimage;" \
			"setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
			"if test -e mmc ${bootpart} ${fdt_path}; then " \
				"run loadfdt;" \
			"else " \
				"echo; echo unable to find ${fdt_file} ...;" \
				"echo booting legacy ...;"\
				"run mmcargs;" \
				"echo debug: [${bootargs}] ... ;" \
				"echo debug: [bootz ${loadaddr}] ... ;" \
				"bootz ${loadaddr}; " \
			"fi;" \
			"run mmcargs;" \
			"echo debug: [${bootargs}] ... ;" \
			"echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
			"bootz ${loadaddr} - ${fdt_addr_r}; " \
		"else " \
			"echo loading from dhcp ...; " \
			"run loadpxe; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	"run mmcboot;"

#define CONFIG_ARP_TIMEOUT	200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP	/* undef to save memory */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */

#define CONFIG_SYS_MEMTEST_START       0x70000000
#define CONFIG_SYS_MEMTEST_END         0x70010000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1			CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
#define PHYS_SDRAM_2			CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
#define PHYS_SDRAM_SIZE			(gd->ram_size)

#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
#define CONFIG_ENV_SIZE        (8 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV 0

/* Framebuffer and LCD */
#define CONFIG_PREBOOT
#define CONFIG_VIDEO_IPUV3
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK	200000000

#endif /* __CONFIG_H */
Commit	Line	Data
98d62e61 PB	1	/*
	2	* Copyright (C) 2015 Beckhoff Automation GmbH & Co. KG
	3	* Patrick Bruenn <p.bruenn@beckhoff.com>
	4	*
	5	* Configuration settings for Beckhoff CX9020.
	6	*
	7	* Based on Freescale's Linux i.MX mx53loco.h file:
	8	* Copyright (C) 2010-2011 Freescale Semiconductor.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
	16	#include <asm/arch/imx-regs.h>
	17
	18	#define CONFIG_CMDLINE_TAG
	19	#define CONFIG_SETUP_MEMORY_TAGS
	20	#define CONFIG_INITRD_TAG
	21
	22	#define CONFIG_SYS_FSL_CLK
	23
	24	/* Size of malloc() pool */
	25	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
	26
98d62e61 PB	27	#define CONFIG_MXC_GPIO
	28	#define CONFIG_REVISION_TAG
	29
	30	#define CONFIG_MXC_UART_BASE UART2_BASE
	31
	32	#define CONFIG_FPGA_COUNT 1
	33
	34	/* MMC Configs */
	35	#define CONFIG_FSL_ESDHC
	36	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	37	#define CONFIG_SYS_FSL_ESDHC_NUM 2
	38
98d62e61	39	/* bootz: zImage/initrd.img support */
98d62e61 PB	40
	41	/* Eth Configs */
	42	#define CONFIG_MII
	43	#define IMX_FEC_BASE FEC_BASE_ADDR
	44	#define CONFIG_ETHPRIME "FEC0"
	45	#define CONFIG_FEC_MXC_PHYADDR 0x1F
	46
	47	/* USB Configs */
98d62e61	48	#define CONFIG_USB_EHCI_MX5
98d62e61 PB	49	#define CONFIG_MXC_USB_PORT 1
	50	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	51	#define CONFIG_MXC_USB_FLAGS 0
	52
	53	/* allow to overwrite serial and ethaddr */
	54	#define CONFIG_ENV_OVERWRITE
	55	#define CONFIG_CONS_INDEX 1
98d62e61 PB	56
	57	/* Command definition */
	58	#define CONFIG_SUPPORT_RAW_INITRD
	59
	60	#define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
	61	#define CONFIG_SYS_TEXT_BASE 0x77800000
	62
	63	#define CONFIG_EXTRA_ENV_SETTINGS \
f8e63850	64	"fdt_addr_r=0x71ff0000\0" \
bc104a70	65	"pxefile_addr_r=0x73000000\0" \
f8e63850	66	"ramdisk_addr_r=0x72000000\0" \
98d62e61 PB	67	"console=ttymxc1,115200\0" \
	68	"uenv=/boot/uEnv.txt\0" \
	69	"optargs=\0" \
	70	"cmdline=\0" \
	71	"mmcdev=0\0" \
	72	"mmcpart=1\0" \
	73	"mmcrootfstype=ext4 rootwait fixrtc\0" \
	74	"mmcargs=setenv bootargs console=${console} " \
	75	"${optargs} " \
	76	"root=/dev/mmcblk${mmcdev}p${mmcpart} ro " \
	77	"rootfstype=${mmcrootfstype} " \
	78	"${cmdline}\0" \
	79	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
bc104a70	80	"loadpxe=dhcp;setenv kernel_addr_r ${loadaddr};pxe get;pxe boot;\0" \
f8e63850	81	"loadrd=load mmc ${bootpart} ${ramdisk_addr_r} ${bootdir}/${rdfile};" \
98d62e61 PB	82	"setenv rdsize ${filesize}\0" \
98d62e61 PB	83	"loadfdt=echo loading ${fdt_path} ...;" \
f8e63850	84	"load mmc ${bootpart} ${fdt_addr_r} ${fdt_path}\0" \
98d62e61 PB	85	"mmcboot=mmc dev ${mmcdev}; " \
	86	"if mmc rescan; then " \
	87	"echo SD/MMC found on device ${mmcdev};" \
	88	"echo Checking for: ${uenv} ...;" \
	89	"setenv bootpart ${mmcdev}:${mmcpart};" \
	90	"if test -e mmc ${bootpart} ${uenv}; then " \
	91	"load mmc ${bootpart} ${loadaddr} ${uenv};" \
	92	"env import -t ${loadaddr} ${filesize};" \
	93	"echo Loaded environment from ${uenv};" \
	94	"if test -n ${dtb}; then " \
	95	"setenv fdt_file ${dtb};" \
	96	"echo Using: dtb=${fdt_file} ...;" \
	97	"fi;" \
	98	"echo Checking for uname_r in ${uenv}...;" \
	99	"if test -n ${uname_r}; then " \
	100	"echo Running uname_boot ...;" \
	101	"run uname_boot;" \
	102	"fi;" \
	103	"fi;" \
	104	"fi;\0" \
	105	"uname_boot="\
	106	"setenv bootdir /boot; " \
	107	"setenv bootfile vmlinuz-${uname_r}; " \
	108	"setenv ccatfile /boot/ccat.rbf; " \
	109	"echo loading CCAT firmware from ${ccatfile}; " \
	110	"load mmc ${bootpart} ${loadaddr} ${ccatfile}; " \
	111	"fpga load 0 ${loadaddr} ${filesize}; " \
	112	"if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
	113	"echo loading ${bootdir}/${bootfile} ...; " \
	114	"run loadimage;" \
	115	"setenv fdt_path /boot/dtbs/${uname_r}/${fdt_file}; " \
	116	"if test -e mmc ${bootpart} ${fdt_path}; then " \
	117	"run loadfdt;" \
	118	"else " \
	119	"echo; echo unable to find ${fdt_file} ...;" \
	120	"echo booting legacy ...;"\
	121	"run mmcargs;" \
	122	"echo debug: [${bootargs}] ... ;" \
	123	"echo debug: [bootz ${loadaddr}] ... ;" \
	124	"bootz ${loadaddr}; " \
	125	"fi;" \
	126	"run mmcargs;" \
	127	"echo debug: [${bootargs}] ... ;" \
f8e63850 PB	128	"echo debug: [bootz ${loadaddr} - ${fdt_addr_r}];" \
f8e63850 PB	129	"bootz ${loadaddr} - ${fdt_addr_r}; " \
bc104a70 PB	130	"else " \
	131	"echo loading from dhcp ...; " \
	132	"run loadpxe; " \
98d62e61 PB	133	"fi;\0"
	134
	135	#define CONFIG_BOOTCOMMAND \
	136	"run mmcboot;"
	137
	138	#define CONFIG_ARP_TIMEOUT 200UL
	139
	140	/* Miscellaneous configurable options */
	141	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	142	#define CONFIG_AUTO_COMPLETE
	143	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
	144
98d62e61 PB	145	#define CONFIG_SYS_MEMTEST_START 0x70000000
	146	#define CONFIG_SYS_MEMTEST_END 0x70010000
	147
	148	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	149
	150	#define CONFIG_CMDLINE_EDITING
	151
	152	/* Physical Memory Map */
	153	#define CONFIG_NR_DRAM_BANKS 2
	154	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
	155	#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size)
	156	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
	157	#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size)
	158	#define PHYS_SDRAM_SIZE (gd->ram_size)
	159
	160	#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
	161	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
	162	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
	163
	164	#define CONFIG_SYS_INIT_SP_OFFSET \
	165	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	166	#define CONFIG_SYS_INIT_SP_ADDR \
	167	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	168
e856bdcf	169	/* environment organization */
98d62e61 PB	170	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
98d62e61 PB	171	#define CONFIG_ENV_SIZE (8 * 1024)
98d62e61 PB	172	#define CONFIG_SYS_MMC_ENV_DEV 0
	173
	174	/* Framebuffer and LCD */
	175	#define CONFIG_PREBOOT
	176	#define CONFIG_VIDEO_IPUV3
	177	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	178	#define CONFIG_VIDEO_BMP_RLE8
	179	#define CONFIG_SPLASH_SCREEN
	180	#define CONFIG_BMP_16BPP
	181	#define CONFIG_VIDEO_LOGO
	182	#define CONFIG_IPUV3_CLK 200000000
	183
	184	#endif /* __CONFIG_H */