[people/ms/u-boot.git] / include / configs / mx53smd.h

/*
 * Copyright (C) 2011 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the MX53SMD Freescale board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MX53

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#define CONFIG_MACH_TYPE	MACH_TYPE_MX53_SMD

#include <asm/arch/imx-regs.h>

#define CONFIG_CMDLINE_TAG			/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

#define CONFIG_SYS_GENERIC_BOARD

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 2 * 1024 * 1024)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MXC_GPIO

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION

/* Eth Configs */
#define CONFIG_HAS_ETH1
#define CONFIG_MII

#define CONFIG_FEC_MXC
#define IMX_FEC_BASE	FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR	0x1F

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX		1
#define CONFIG_BAUDRATE			115200

/* Command definition */
#include <config_cmd_default.h>

#undef CONFIG_CMD_IMLS

#define CONFIG_BOOTDELAY	3

#define CONFIG_ETHPRIME		"FEC0"

#define CONFIG_LOADADDR		0x70800000	/* loadaddr env var */
#define CONFIG_SYS_TEXT_BASE    0x77800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"uimage=uImage\0" \
	"mmcdev=0\0" \
	"mmcpart=2\0" \
	"mmcroot=/dev/mmcblk0p3 rw\0" \
	"mmcrootfstype=ext3 rootwait\0" \
	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm\0" \
	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
		"root=/dev/nfs " \
		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"dhcp ${uimage}; bootm\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loaduimage; then " \
				"run mmcboot; " \
			"else run netboot; " \
			"fi; " \
		"fi; " \
	"else run netboot; fi"
#define CONFIG_ARP_TIMEOUT	200UL

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */

#define CONFIG_SYS_MEMTEST_START       0x70000000
#define CONFIG_SYS_MEMTEST_END         0x70010000

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		CSD0_BASE_ADDR
#define PHYS_SDRAM_1_SIZE	(512 * 1024 * 1024)
#define PHYS_SDRAM_2		CSD1_BASE_ADDR
#define PHYS_SDRAM_2_SIZE	(512 * 1024 * 1024)
#define PHYS_SDRAM_SIZE         (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)

#define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
#define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
#define CONFIG_SYS_INIT_RAM_SIZE	(IRAM_SIZE)

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
#define CONFIG_ENV_SIZE        (8 * 1024)
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SYS_MMC_ENV_DEV 0

#define CONFIG_OF_LIBFDT

#endif				/* __CONFIG_H */
Commit	Line	Data
860b32ee FE	1	/*
	2	* Copyright (C) 2011 Freescale Semiconductor, Inc.
	3	*
c4c596fb	4	* Configuration settings for the MX53SMD Freescale board.
860b32ee	5	*
3765b3e7	6	* SPDX-License-Identifier: GPL-2.0+
860b32ee FE	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
	12	#define CONFIG_MX53
	13
860b32ee FE	14	#define CONFIG_DISPLAY_CPUINFO
	15	#define CONFIG_DISPLAY_BOARDINFO
	16
c4c596fb FE	17	#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
c4c596fb FE	18
860b32ee FE	19	#include <asm/arch/imx-regs.h>
	20
	21	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
860b32ee FE	22	#define CONFIG_SETUP_MEMORY_TAGS
860b32ee FE	23	#define CONFIG_INITRD_TAG
fd622f23	24	#define CONFIG_REVISION_TAG
860b32ee	25
5a416df0 FE	26	#define CONFIG_SYS_GENERIC_BOARD
5a416df0 FE	27
860b32ee FE	28	/* Size of malloc() pool */
	29	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
	30
	31	#define CONFIG_BOARD_EARLY_INIT_F
	32	#define CONFIG_MXC_GPIO
	33
	34	#define CONFIG_MXC_UART
40f6fffe	35	#define CONFIG_MXC_UART_BASE UART1_BASE
860b32ee FE	36
	37	/* I2C Configs */
	38	#define CONFIG_CMD_I2C
b089d039	39	#define CONFIG_SYS_I2C
b089d039	40	#define CONFIG_SYS_I2C_MXC
f8cb101e	41	#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
860b32ee FE	42
	43	/* MMC Configs */
	44	#define CONFIG_FSL_ESDHC
	45	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	46	#define CONFIG_SYS_FSL_ESDHC_NUM 1
	47
	48	#define CONFIG_MMC
	49	#define CONFIG_CMD_MMC
	50	#define CONFIG_GENERIC_MMC
	51	#define CONFIG_CMD_FAT
	52	#define CONFIG_DOS_PARTITION
	53
	54	/* Eth Configs */
	55	#define CONFIG_HAS_ETH1
860b32ee	56	#define CONFIG_MII
860b32ee FE	57
	58	#define CONFIG_FEC_MXC
	59	#define IMX_FEC_BASE FEC_BASE_ADDR
	60	#define CONFIG_FEC_MXC_PHYADDR 0x1F
	61
	62	#define CONFIG_CMD_PING
	63	#define CONFIG_CMD_DHCP
	64	#define CONFIG_CMD_MII
	65	#define CONFIG_CMD_NET
	66
	67	/* allow to overwrite serial and ethaddr */
	68	#define CONFIG_ENV_OVERWRITE
	69	#define CONFIG_CONS_INDEX 1
	70	#define CONFIG_BAUDRATE 115200
860b32ee FE	71
	72	/* Command definition */
	73	#include <config_cmd_default.h>
	74
	75	#undef CONFIG_CMD_IMLS
	76
	77	#define CONFIG_BOOTDELAY 3
	78
28b119e9	79	#define CONFIG_ETHPRIME "FEC0"
860b32ee FE	80
	81	#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
	82	#define CONFIG_SYS_TEXT_BASE 0x77800000
	83
	84	#define CONFIG_EXTRA_ENV_SETTINGS \
	85	"script=boot.scr\0" \
	86	"uimage=uImage\0" \
	87	"mmcdev=0\0" \
	88	"mmcpart=2\0" \
	89	"mmcroot=/dev/mmcblk0p3 rw\0" \
	90	"mmcrootfstype=ext3 rootwait\0" \
	91	"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
	92	"root=${mmcroot} " \
	93	"rootfstype=${mmcrootfstype}\0" \
	94	"loadbootscript=" \
	95	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	96	"bootscript=echo Running bootscript from mmc ...; " \
	97	"source\0" \
	98	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	99	"mmcboot=echo Booting from mmc ...; " \
	100	"run mmcargs; " \
	101	"bootm\0" \
	102	"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
	103	"root=/dev/nfs " \
	104	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	105	"netboot=echo Booting from net ...; " \
	106	"run netargs; " \
	107	"dhcp ${uimage}; bootm\0" \
	108
	109	#define CONFIG_BOOTCOMMAND \
66968110	110	"mmc dev ${mmcdev}; if mmc rescan; then " \
860b32ee FE	111	"if run loadbootscript; then " \
	112	"run bootscript; " \
	113	"else " \
	114	"if run loaduimage; then " \
	115	"run mmcboot; " \
	116	"else run netboot; " \
	117	"fi; " \
	118	"fi; " \
	119	"else run netboot; fi"
	120	#define CONFIG_ARP_TIMEOUT 200UL
	121
	122	/* Miscellaneous configurable options */
	123	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	124	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
860b32ee FE	125	#define CONFIG_AUTO_COMPLETE
	126	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	127
	128	/* Print Buffer Size */
	129	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	130	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	131	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
	132
	133	#define CONFIG_SYS_MEMTEST_START 0x70000000
869aed7b	134	#define CONFIG_SYS_MEMTEST_END 0x70010000
860b32ee FE	135
	136	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	137
860b32ee FE	138	#define CONFIG_CMDLINE_EDITING
860b32ee FE	139
860b32ee FE	140	/* Physical Memory Map */
	141	#define CONFIG_NR_DRAM_BANKS 2
	142	#define PHYS_SDRAM_1 CSD0_BASE_ADDR
	143	#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
	144	#define PHYS_SDRAM_2 CSD1_BASE_ADDR
	145	#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
	146	#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
	147
	148	#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
	149	#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
	150	#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
	151
	152	#define CONFIG_SYS_INIT_SP_OFFSET \
	153	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	154	#define CONFIG_SYS_INIT_SP_ADDR \
	155	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	156
	157	/* FLASH and environment organization */
	158	#define CONFIG_SYS_NO_FLASH
	159
	160	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	161	#define CONFIG_ENV_SIZE (8 * 1024)
	162	#define CONFIG_ENV_IS_IN_MMC
	163	#define CONFIG_SYS_MMC_ENV_DEV 0
	164
	165	#define CONFIG_OF_LIBFDT
860b32ee FE	166
860b32ee FE	167	#endif /* __CONFIG_H */