projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 8f393776 SW |
1 | /* |
| 2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | |
| 3 | * | |
| 5b8031cc | 4 | * SPDX-License-Identifier: GPL-2.0 |
| 8f393776 SW |
5 | */ |
| 6 | ||
| 7 | #ifndef __MX6_COMMON_H | |
| 8 | #define __MX6_COMMON_H | |
| 9 | ||
| 46718353 SA |
10 | #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)) |
| 11 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ | |
| 12 | #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK | |
| 13 | #else | |
| 6d73c234 FE |
14 | #ifndef CONFIG_SYS_L2CACHE_OFF |
| 15 | #define CONFIG_SYS_L2_PL310 | |
| 16 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE | |
| 17 | #endif | |
| 18 | ||
| a76df709 | 19 | #define CONFIG_MP |
| 436cf40f PF |
20 | #endif |
| 21 | #define CONFIG_BOARD_POSTCLK_INIT | |
| f13ac7b2 | 22 | #define CONFIG_MXC_GPT_HCLK |
| a76df709 | 23 | |
| 1ecd2eaa PF |
24 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
| 25 | ||
| 056845c2 PR |
26 | #include <linux/sizes.h> |
| 27 | #include <asm/arch/imx-regs.h> | |
| 552a848e | 28 | #include <asm/mach-imx/gpio.h> |
| 056845c2 | 29 | |
| 3b1f6811 PR |
30 | #ifndef CONFIG_MX6 |
| 31 | #define CONFIG_MX6 | |
| 32 | #endif | |
| 33 | ||
| 18fb0e3c | 34 | #define CONFIG_SYS_FSL_CLK |
| 3b1f6811 | 35 | |
| ea690917 PR |
36 | /* ATAGs */ |
| 37 | #define CONFIG_CMDLINE_TAG | |
| 38 | #define CONFIG_SETUP_MEMORY_TAGS | |
| 39 | #define CONFIG_INITRD_TAG | |
| 40 | #define CONFIG_REVISION_TAG | |
| 41 | ||
| 81830581 | 42 | /* Boot options */ |
| 290e7cfd FE |
43 | #if defined(CONFIG_MX6SL) || defined(CONFIG_MX6SLL) || \ |
| 44 | defined(CONFIG_MX6SX) || \ | |
| 45 | defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) | |
| cd6ddc48 FE |
46 | #define CONFIG_LOADADDR 0x82000000 |
| 47 | #ifndef CONFIG_SYS_TEXT_BASE | |
| 48 | #define CONFIG_SYS_TEXT_BASE 0x87800000 | |
| 49 | #endif | |
| 50 | #else | |
| 81830581 | 51 | #define CONFIG_LOADADDR 0x12000000 |
| 81830581 PR |
52 | #ifndef CONFIG_SYS_TEXT_BASE |
| 53 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | |
| 54 | #endif | |
| cd6ddc48 FE |
55 | #endif |
| 56 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
| 57 | ||
| 2d8a0747 PR |
58 | /* allow to overwrite serial and ethaddr */ |
| 59 | #define CONFIG_ENV_OVERWRITE | |
| 60 | #define CONFIG_CONS_INDEX 1 | |
| 2d8a0747 | 61 | |
| a380ce6e | 62 | /* Filesystems and image support */ |
| a380ce6e | 63 | #define CONFIG_SUPPORT_RAW_INITRD |
| a380ce6e | 64 | |
| 2d8a0747 | 65 | /* Miscellaneous configurable options */ |
| 2d8a0747 | 66 | #define CONFIG_SYS_LONGHELP |
| 2d8a0747 PR |
67 | #define CONFIG_CMDLINE_EDITING |
| 68 | #define CONFIG_AUTO_COMPLETE | |
| 69 | #define CONFIG_SYS_CBSIZE 512 | |
| 70 | #define CONFIG_SYS_MAXARGS 32 | |
| 2d8a0747 | 71 | |
| 302b2e5b PR |
72 | /* GPIO */ |
| 73 | #define CONFIG_MXC_GPIO | |
| 302b2e5b | 74 | |
| e51c1e8e | 75 | /* MMC */ |
| e51c1e8e PR |
76 | #define CONFIG_BOUNCE_BUFFER |
| 77 | #define CONFIG_FSL_ESDHC | |
| 78 | #define CONFIG_FSL_USDHC | |
| 79 | ||
| 3c73b0a4 | 80 | /* Fuses */ |
| 3c73b0a4 PR |
81 | #define CONFIG_MXC_OCOTP |
| 82 | ||
| e22685d2 GB |
83 | /* Secure boot (HAB) support */ |
| 84 | #ifdef CONFIG_SECURE_BOOT | |
| 85 | #define CONFIG_CSF_SIZE 0x2000 | |
| 15b505b0 SE |
86 | #ifdef CONFIG_SPL_BUILD |
| 87 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT | |
| 88 | #endif | |
| e22685d2 GB |
89 | #endif |
| 90 | ||
| 8f393776 | 91 | #endif |