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Commit | Line | Data |
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8f393776 SW |
1 | /* |
2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | |
3 | * | |
5b8031cc | 4 | * SPDX-License-Identifier: GPL-2.0 |
8f393776 SW |
5 | */ |
6 | ||
7 | #ifndef __MX6_COMMON_H | |
8 | #define __MX6_COMMON_H | |
9 | ||
436cf40f | 10 | #ifndef CONFIG_MX6UL |
6d73c234 FE |
11 | #ifndef CONFIG_SYS_L2CACHE_OFF |
12 | #define CONFIG_SYS_L2_PL310 | |
13 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE | |
14 | #endif | |
15 | ||
a76df709 | 16 | #define CONFIG_MP |
436cf40f PF |
17 | #endif |
18 | #define CONFIG_BOARD_POSTCLK_INIT | |
f13ac7b2 | 19 | #define CONFIG_MXC_GPT_HCLK |
a76df709 | 20 | |
1ecd2eaa PF |
21 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
22 | ||
056845c2 PR |
23 | #include <linux/sizes.h> |
24 | #include <asm/arch/imx-regs.h> | |
552a848e | 25 | #include <asm/mach-imx/gpio.h> |
056845c2 | 26 | |
3b1f6811 PR |
27 | #ifndef CONFIG_MX6 |
28 | #define CONFIG_MX6 | |
29 | #endif | |
30 | ||
18fb0e3c | 31 | #define CONFIG_SYS_FSL_CLK |
3b1f6811 | 32 | |
ea690917 PR |
33 | /* ATAGs */ |
34 | #define CONFIG_CMDLINE_TAG | |
35 | #define CONFIG_SETUP_MEMORY_TAGS | |
36 | #define CONFIG_INITRD_TAG | |
37 | #define CONFIG_REVISION_TAG | |
38 | ||
81830581 | 39 | /* Boot options */ |
01140119 PF |
40 | #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \ |
41 | defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL)) | |
cd6ddc48 FE |
42 | #define CONFIG_LOADADDR 0x82000000 |
43 | #ifndef CONFIG_SYS_TEXT_BASE | |
44 | #define CONFIG_SYS_TEXT_BASE 0x87800000 | |
45 | #endif | |
46 | #else | |
81830581 | 47 | #define CONFIG_LOADADDR 0x12000000 |
81830581 PR |
48 | #ifndef CONFIG_SYS_TEXT_BASE |
49 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | |
50 | #endif | |
cd6ddc48 FE |
51 | #endif |
52 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
53 | ||
2d8a0747 PR |
54 | /* allow to overwrite serial and ethaddr */ |
55 | #define CONFIG_ENV_OVERWRITE | |
56 | #define CONFIG_CONS_INDEX 1 | |
2d8a0747 | 57 | |
a380ce6e | 58 | /* Filesystems and image support */ |
a380ce6e | 59 | #define CONFIG_SUPPORT_RAW_INITRD |
a380ce6e | 60 | |
2d8a0747 | 61 | /* Miscellaneous configurable options */ |
2d8a0747 | 62 | #define CONFIG_SYS_LONGHELP |
2d8a0747 PR |
63 | #define CONFIG_CMDLINE_EDITING |
64 | #define CONFIG_AUTO_COMPLETE | |
65 | #define CONFIG_SYS_CBSIZE 512 | |
66 | #define CONFIG_SYS_MAXARGS 32 | |
67 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
68 | ||
1022b85c | 69 | #ifndef CONFIG_SYS_DCACHE_OFF |
1022b85c PR |
70 | #endif |
71 | ||
302b2e5b PR |
72 | /* GPIO */ |
73 | #define CONFIG_MXC_GPIO | |
302b2e5b | 74 | |
e51c1e8e | 75 | /* MMC */ |
e51c1e8e PR |
76 | #define CONFIG_BOUNCE_BUFFER |
77 | #define CONFIG_FSL_ESDHC | |
78 | #define CONFIG_FSL_USDHC | |
79 | ||
3c73b0a4 | 80 | /* Fuses */ |
3c73b0a4 PR |
81 | #define CONFIG_MXC_OCOTP |
82 | ||
e22685d2 GB |
83 | /* Secure boot (HAB) support */ |
84 | #ifdef CONFIG_SECURE_BOOT | |
85 | #define CONFIG_CSF_SIZE 0x2000 | |
15b505b0 SE |
86 | #ifdef CONFIG_SPL_BUILD |
87 | #define CONFIG_SPL_DRIVERS_MISC_SUPPORT | |
88 | #endif | |
e22685d2 GB |
89 | #endif |
90 | ||
8f393776 | 91 | #endif |