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8f393776 SW |
1 | /* |
2 | * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. | |
3 | * | |
5b8031cc | 4 | * SPDX-License-Identifier: GPL-2.0 |
8f393776 SW |
5 | */ |
6 | ||
7 | #ifndef __MX6_COMMON_H | |
8 | #define __MX6_COMMON_H | |
9 | ||
436cf40f | 10 | #ifndef CONFIG_MX6UL |
8f393776 SW |
11 | #define CONFIG_ARM_ERRATA_743622 |
12 | #define CONFIG_ARM_ERRATA_751472 | |
68659d64 NG |
13 | #define CONFIG_ARM_ERRATA_794072 |
14 | #define CONFIG_ARM_ERRATA_761320 | |
8f393776 | 15 | |
6d73c234 FE |
16 | #ifndef CONFIG_SYS_L2CACHE_OFF |
17 | #define CONFIG_SYS_L2_PL310 | |
18 | #define CONFIG_SYS_PL310_BASE L2_PL310_BASE | |
19 | #endif | |
20 | ||
a76df709 | 21 | #define CONFIG_MP |
436cf40f PF |
22 | #endif |
23 | #define CONFIG_BOARD_POSTCLK_INIT | |
f13ac7b2 | 24 | #define CONFIG_MXC_GPT_HCLK |
a76df709 | 25 | |
056845c2 PR |
26 | #define CONFIG_SYS_NO_FLASH |
27 | ||
28 | #include <linux/sizes.h> | |
29 | #include <asm/arch/imx-regs.h> | |
30 | #include <asm/imx-common/gpio.h> | |
056845c2 | 31 | |
3b1f6811 PR |
32 | #ifndef CONFIG_MX6 |
33 | #define CONFIG_MX6 | |
34 | #endif | |
35 | ||
36 | #define CONFIG_DISPLAY_BOARDINFO | |
37 | #define CONFIG_DISPLAY_CPUINFO | |
18fb0e3c | 38 | #define CONFIG_SYS_FSL_CLK |
3b1f6811 | 39 | |
ea690917 PR |
40 | /* ATAGs */ |
41 | #define CONFIG_CMDLINE_TAG | |
42 | #define CONFIG_SETUP_MEMORY_TAGS | |
43 | #define CONFIG_INITRD_TAG | |
44 | #define CONFIG_REVISION_TAG | |
45 | ||
81830581 | 46 | /* Boot options */ |
94bd1d14 | 47 | #if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || defined(CONFIG_MX6UL)) |
cd6ddc48 FE |
48 | #define CONFIG_LOADADDR 0x82000000 |
49 | #ifndef CONFIG_SYS_TEXT_BASE | |
50 | #define CONFIG_SYS_TEXT_BASE 0x87800000 | |
51 | #endif | |
52 | #else | |
81830581 | 53 | #define CONFIG_LOADADDR 0x12000000 |
81830581 PR |
54 | #ifndef CONFIG_SYS_TEXT_BASE |
55 | #define CONFIG_SYS_TEXT_BASE 0x17800000 | |
56 | #endif | |
cd6ddc48 FE |
57 | #endif |
58 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
59 | ||
81830581 PR |
60 | #ifndef CONFIG_BOOTDELAY |
61 | #define CONFIG_BOOTDELAY 3 | |
62 | #endif | |
63 | ||
2d8a0747 PR |
64 | /* allow to overwrite serial and ethaddr */ |
65 | #define CONFIG_ENV_OVERWRITE | |
66 | #define CONFIG_CONS_INDEX 1 | |
67 | #define CONFIG_BAUDRATE 115200 | |
68 | ||
a380ce6e PR |
69 | /* Filesystems and image support */ |
70 | #define CONFIG_OF_LIBFDT | |
71 | #define CONFIG_CMD_BOOTZ | |
72 | #define CONFIG_SUPPORT_RAW_INITRD | |
73 | #define CONFIG_CMD_FS_GENERIC | |
74 | #define CONFIG_DOS_PARTITION | |
75 | #define CONFIG_CMD_EXT2 | |
76 | #define CONFIG_CMD_EXT4 | |
77 | #define CONFIG_CMD_EXT4_WRITE | |
78 | #define CONFIG_CMD_FAT | |
79 | ||
2d8a0747 | 80 | /* Miscellaneous configurable options */ |
2d8a0747 PR |
81 | #undef CONFIG_CMD_IMLS |
82 | #define CONFIG_SYS_LONGHELP | |
83 | #define CONFIG_SYS_HUSH_PARSER | |
84 | #define CONFIG_CMDLINE_EDITING | |
85 | #define CONFIG_AUTO_COMPLETE | |
86 | #define CONFIG_SYS_CBSIZE 512 | |
87 | #define CONFIG_SYS_MAXARGS 32 | |
88 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
89 | ||
1022b85c PR |
90 | #ifndef CONFIG_SYS_DCACHE_OFF |
91 | #define CONFIG_CMD_CACHE | |
92 | #endif | |
93 | ||
302b2e5b PR |
94 | /* GPIO */ |
95 | #define CONFIG_MXC_GPIO | |
302b2e5b | 96 | |
e51c1e8e PR |
97 | /* MMC */ |
98 | #define CONFIG_MMC | |
99 | #define CONFIG_CMD_MMC | |
100 | #define CONFIG_GENERIC_MMC | |
101 | #define CONFIG_BOUNCE_BUFFER | |
102 | #define CONFIG_FSL_ESDHC | |
103 | #define CONFIG_FSL_USDHC | |
104 | ||
3c73b0a4 PR |
105 | /* Fuses */ |
106 | #define CONFIG_CMD_FUSE | |
107 | #define CONFIG_MXC_OCOTP | |
108 | ||
8f393776 | 109 | #endif |