[people/ms/u-boot.git] / include / configs / mx6qsabrelite.h

/*
 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6Q Sabre Lite board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MX6
#define CONFIG_MX6Q

#include "mx6_common.h"

#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO

#define CONFIG_MACH_TYPE	3769

#include <asm/arch/imx-regs.h>
#include <asm/imx-common/gpio.h>

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)

#define CONFIG_BOARD_EARLY_INIT_F
#define CONFIG_MISC_INIT_R
#define CONFIG_MXC_GPIO

#define CONFIG_CMD_FUSE
#ifdef CONFIG_CMD_FUSE
#define CONFIG_MXC_OCOTP
#endif

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	       UART2_BASE

#define CONFIG_CMD_SF
#ifdef CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_SST
#define CONFIG_MXC_SPI
#define CONFIG_SF_DEFAULT_BUS  0
#define CONFIG_SF_DEFAULT_CS   (0|(IMX_GPIO_NR(3, 19)<<8))
#define CONFIG_SF_DEFAULT_SPEED 25000000
#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
#endif

/* I2C Configs */
#define CONFIG_CMD_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
#define CONFIG_SYS_I2C_SPEED		100000

/* MMC Configs */
#define CONFIG_FSL_ESDHC
#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR      0
#define CONFIG_SYS_FSL_USDHC_NUM       2

#define CONFIG_MMC
#define CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_FAT
#define CONFIG_DOS_PARTITION

#define CONFIG_CMD_SATA
/*
 * SATA Configs
 */
#ifdef CONFIG_CMD_SATA
#define CONFIG_DWC_AHSATA
#define CONFIG_SYS_SATA_MAX_DEVICE	1
#define CONFIG_DWC_AHSATA_PORT_ID	0
#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
#define CONFIG_LBA48
#define CONFIG_LIBATA
#endif

#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE		RGMII
#define CONFIG_ETHPRIME			"FEC"
#define CONFIG_FEC_MXC_PHYADDR		6
#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#define CONFIG_PHY_MICREL_KSZ9021

/* USB Configs */
#define CONFIG_CMD_USB
#define CONFIG_CMD_FAT
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_USB_STORAGE
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_SMSC95XX
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* Miscellaneous commands */
#define CONFIG_CMD_BMODE

/* Framebuffer and LCD */
#define CONFIG_VIDEO
#define CONFIG_VIDEO_IPUV3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VGA_AS_SINGLE_DEVICE
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_SPLASH_SCREEN
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_IPUV3_CLK 260000000

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	       1
#define CONFIG_BAUDRATE			       115200

/* Command definition */
#include <config_cmd_default.h>

#undef CONFIG_CMD_IMLS

#define CONFIG_BOOTDELAY	       1

#define CONFIG_PREBOOT                 ""

#define CONFIG_LOADADDR			       0x12000000
#define CONFIG_SYS_TEXT_BASE	       0x17800000

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"uimage=uImage\0" \
	"console=ttymxc1\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=imx6q-sabrelite.dtb\0" \
	"fdt_addr=0x11000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"mmcdev=0\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${uimage}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootm ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootm; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootm; " \
		"fi;\0"

#define CONFIG_BOOTCOMMAND \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loaduimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT	       "MX6QSABRELITE U-Boot > "
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_CBSIZE	       256

/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS	       16
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE

#define CONFIG_SYS_MEMTEST_START       0x10000000
#define CONFIG_SYS_MEMTEST_END	       0x10010000
#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000

#define CONFIG_SYS_LOAD_ADDR	       CONFIG_LOADADDR
#define CONFIG_SYS_HZ		       1000

#define CONFIG_CMDLINE_EDITING

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS	       1
#define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
#define PHYS_SDRAM_SIZE			       (1u * 1024 * 1024 * 1024)

#define CONFIG_SYS_SDRAM_BASE	       PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
       (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
       (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_ENV_IS_IN_MMC
/* #define CONFIG_ENV_IS_IN_SPI_FLASH */

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV		0
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET		(768 * 1024)
#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#endif

#define CONFIG_OF_LIBFDT
#define CONFIG_CMD_BOOTZ

#ifndef CONFIG_SYS_DCACHE_OFF
#define CONFIG_CMD_CACHE
#endif

#endif			       /* __CONFIG_H */
Commit	Line	Data
bc5833c4 JL	1	/*
	2	* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale i.MX6Q Sabre Lite board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
bc5833c4 JL	7	*/
	8
	9	#ifndef __CONFIG_H
	10	#define __CONFIG_H
	11
5ea6d7c8	12	#define CONFIG_MX6
bc5833c4	13	#define CONFIG_MX6Q
8f393776 SW	14
	15	#include "mx6_common.h"
	16
bc5833c4 JL	17	#define CONFIG_DISPLAY_CPUINFO
	18	#define CONFIG_DISPLAY_BOARDINFO
	19
c338f0b5 EN	20	#define CONFIG_MACH_TYPE 3769
c338f0b5 EN	21
bc5833c4	22	#include <asm/arch/imx-regs.h>
5fecb36c	23	#include <asm/imx-common/gpio.h>
bc5833c4 JL	24
	25	#define CONFIG_CMDLINE_TAG
	26	#define CONFIG_SETUP_MEMORY_TAGS
	27	#define CONFIG_INITRD_TAG
1c9ceff8	28	#define CONFIG_REVISION_TAG
bc5833c4 JL	29
bc5833c4 JL	30	/* Size of malloc() pool */
e58010b5	31	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
bc5833c4	32
bc5833c4	33	#define CONFIG_BOARD_EARLY_INIT_F
28fdbddc	34	#define CONFIG_MISC_INIT_R
bc5833c4 JL	35	#define CONFIG_MXC_GPIO
bc5833c4 JL	36
f9bac4bc BT	37	#define CONFIG_CMD_FUSE
	38	#ifdef CONFIG_CMD_FUSE
	39	#define CONFIG_MXC_OCOTP
	40	#endif
	41
bc5833c4	42	#define CONFIG_MXC_UART
f5cdc117	43	#define CONFIG_MXC_UART_BASE UART2_BASE
bc5833c4	44
373a1d8c EN	45	#define CONFIG_CMD_SF
	46	#ifdef CONFIG_CMD_SF
	47	#define CONFIG_SPI_FLASH
	48	#define CONFIG_SPI_FLASH_SST
	49	#define CONFIG_MXC_SPI
ba54b927	50	#define CONFIG_SF_DEFAULT_BUS 0
5fecb36c	51	#define CONFIG_SF_DEFAULT_CS (0\|(IMX_GPIO_NR(3, 19)<<8))
373a1d8c EN	52	#define CONFIG_SF_DEFAULT_SPEED 25000000
	53	#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
	54	#endif
	55
3174689b TK	56	/* I2C Configs */
3174689b TK	57	#define CONFIG_CMD_I2C
9c067828	58	#define CONFIG_I2C_MULTI_BUS
3174689b	59	#define CONFIG_I2C_MXC
9c067828	60	#define CONFIG_SYS_I2C_SPEED 100000
3174689b	61
bc5833c4 JL	62	/* MMC Configs */
	63	#define CONFIG_FSL_ESDHC
	64	#define CONFIG_FSL_USDHC
	65	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	66	#define CONFIG_SYS_FSL_USDHC_NUM 2
	67
	68	#define CONFIG_MMC
	69	#define CONFIG_CMD_MMC
	70	#define CONFIG_GENERIC_MMC
640fb607	71	#define CONFIG_BOUNCE_BUFFER
9ff323df	72	#define CONFIG_CMD_EXT2
bc5833c4 JL	73	#define CONFIG_CMD_FAT
	74	#define CONFIG_DOS_PARTITION
	75
3996a96c EN	76	#define CONFIG_CMD_SATA
	77	/*
	78	* SATA Configs
	79	*/
	80	#ifdef CONFIG_CMD_SATA
	81	#define CONFIG_DWC_AHSATA
	82	#define CONFIG_SYS_SATA_MAX_DEVICE 1
	83	#define CONFIG_DWC_AHSATA_PORT_ID 0
	84	#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
	85	#define CONFIG_LBA48
	86	#define CONFIG_LIBATA
	87	#endif
	88
2af81e27 JL	89	#define CONFIG_CMD_PING
	90	#define CONFIG_CMD_DHCP
	91	#define CONFIG_CMD_MII
	92	#define CONFIG_CMD_NET
f5cdc117 WD	93	#define CONFIG_FEC_MXC
f5cdc117 WD	94	#define CONFIG_MII
2af81e27	95	#define IMX_FEC_BASE ENET_BASE_ADDR
f5cdc117	96	#define CONFIG_FEC_XCV_TYPE RGMII
2af81e27 JL	97	#define CONFIG_ETHPRIME "FEC"
2af81e27 JL	98	#define CONFIG_FEC_MXC_PHYADDR 6
2bf3359e TK	99	#define CONFIG_PHYLIB
2bf3359e TK	100	#define CONFIG_PHY_MICREL
cc5f5522	101	#define CONFIG_PHY_MICREL_KSZ9021
2af81e27	102
2ea73e9e WG	103	/* USB Configs */
	104	#define CONFIG_CMD_USB
	105	#define CONFIG_CMD_FAT
	106	#define CONFIG_USB_EHCI
	107	#define CONFIG_USB_EHCI_MX6
	108	#define CONFIG_USB_STORAGE
	109	#define CONFIG_USB_HOST_ETHER
	110	#define CONFIG_USB_ETHER_ASIX
	111	#define CONFIG_USB_ETHER_SMSC95XX
	112	#define CONFIG_MXC_USB_PORT 1
	113	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	114	#define CONFIG_MXC_USB_FLAGS 0
	115
bb05b40b TK	116	/* Miscellaneous commands */
	117	#define CONFIG_CMD_BMODE
	118
e58010b5 EN	119	/* Framebuffer and LCD */
	120	#define CONFIG_VIDEO
	121	#define CONFIG_VIDEO_IPUV3
	122	#define CONFIG_CFB_CONSOLE
	123	#define CONFIG_VGA_AS_SINGLE_DEVICE
	124	#define CONFIG_SYS_CONSOLE_IS_IN_ENV
	125	#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
	126	#define CONFIG_VIDEO_BMP_RLE8
	127	#define CONFIG_SPLASH_SCREEN
	128	#define CONFIG_BMP_16BPP
	129	#define CONFIG_VIDEO_LOGO
	130	#define CONFIG_IPUV3_CLK 260000000
	131
bc5833c4 JL	132	/* allow to overwrite serial and ethaddr */
bc5833c4 JL	133	#define CONFIG_ENV_OVERWRITE
f5cdc117 WD	134	#define CONFIG_CONS_INDEX 1
f5cdc117 WD	135	#define CONFIG_BAUDRATE 115200
bc5833c4 JL	136
	137	/* Command definition */
	138	#include <config_cmd_default.h>
	139
	140	#undef CONFIG_CMD_IMLS
bc5833c4	141
eb141bd3	142	#define CONFIG_BOOTDELAY 1
bc5833c4	143
28fdbddc EN	144	#define CONFIG_PREBOOT ""
28fdbddc EN	145
589b1afd	146	#define CONFIG_LOADADDR 0x12000000
f5cdc117	147	#define CONFIG_SYS_TEXT_BASE 0x17800000
bc5833c4 JL	148
bc5833c4 JL	149	#define CONFIG_EXTRA_ENV_SETTINGS \
d17087cd OS	150	"script=boot.scr\0" \
d17087cd OS	151	"uimage=uImage\0" \
f4ac6cb6	152	"console=ttymxc1\0" \
d17087cd	153	"fdt_high=0xffffffff\0" \
7e9603e7	154	"initrd_high=0xffffffff\0" \
6efbe219 OS	155	"fdt_file=imx6q-sabrelite.dtb\0" \
	156	"fdt_addr=0x11000000\0" \
	157	"boot_fdt=try\0" \
	158	"ip_dyn=yes\0" \
d17087cd	159	"mmcdev=0\0" \
21692281 OS	160	"mmcpart=1\0" \
21692281 OS	161	"mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
d17087cd OS	162	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	163	"root=${mmcroot}\0" \
	164	"loadbootscript=" \
	165	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	166	"bootscript=echo Running bootscript from mmc ...; " \
	167	"source\0" \
	168	"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
6efbe219	169	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
d17087cd OS	170	"mmcboot=echo Booting from mmc ...; " \
d17087cd OS	171	"run mmcargs; " \
6efbe219 OS	172	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	173	"if run loadfdt; then " \
	174	"bootm ${loadaddr} - ${fdt_addr}; " \
	175	"else " \
	176	"if test ${boot_fdt} = try; then " \
	177	"bootm; " \
	178	"else " \
	179	"echo WARN: Cannot load the DT; " \
	180	"fi; " \
	181	"fi; " \
	182	"else " \
	183	"bootm; " \
	184	"fi;\0" \
d17087cd OS	185	"netargs=setenv bootargs console=${console},${baudrate} " \
	186	"root=/dev/nfs " \
	187	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	188	"netboot=echo Booting from net ...; " \
	189	"run netargs; " \
6efbe219 OS	190	"if test ${ip_dyn} = yes; then " \
	191	"setenv get_cmd dhcp; " \
	192	"else " \
	193	"setenv get_cmd tftp; " \
	194	"fi; " \
	195	"${get_cmd} ${uimage}; " \
	196	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	197	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	198	"bootm ${loadaddr} - ${fdt_addr}; " \
	199	"else " \
	200	"if test ${boot_fdt} = try; then " \
	201	"bootm; " \
	202	"else " \
	203	"echo WARN: Cannot load the DT; " \
	204	"fi; " \
	205	"fi; " \
	206	"else " \
	207	"bootm; " \
	208	"fi;\0"
bc5833c4 JL	209
bc5833c4 JL	210	#define CONFIG_BOOTCOMMAND \
d17087cd OS	211	"mmc dev ${mmcdev}; if mmc rescan; then " \
	212	"if run loadbootscript; then " \
	213	"run bootscript; " \
	214	"else " \
	215	"if run loaduimage; then " \
	216	"run mmcboot; " \
	217	"else run netboot; " \
	218	"fi; " \
	219	"fi; " \
	220	"else run netboot; fi"
bc5833c4	221
bc5833c4 JL	222	/* Miscellaneous configurable options */
	223	#define CONFIG_SYS_LONGHELP
	224	#define CONFIG_SYS_HUSH_PARSER
f5cdc117	225	#define CONFIG_SYS_PROMPT "MX6QSABRELITE U-Boot > "
bc5833c4	226	#define CONFIG_AUTO_COMPLETE
f5cdc117	227	#define CONFIG_SYS_CBSIZE 256
bc5833c4 JL	228
	229	/* Print Buffer Size */
	230	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
f5cdc117	231	#define CONFIG_SYS_MAXARGS 16
bc5833c4 JL	232	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	233
	234	#define CONFIG_SYS_MEMTEST_START 0x10000000
f5cdc117	235	#define CONFIG_SYS_MEMTEST_END 0x10010000
bec0160e	236	#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
bc5833c4	237
f5cdc117 WD	238	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
f5cdc117 WD	239	#define CONFIG_SYS_HZ 1000
bc5833c4 JL	240
bc5833c4 JL	241	#define CONFIG_CMDLINE_EDITING
bc5833c4 JL	242
bc5833c4 JL	243	/* Physical Memory Map */
f5cdc117 WD	244	#define CONFIG_NR_DRAM_BANKS 1
	245	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	246	#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
bc5833c4	247
f5cdc117	248	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
bc5833c4 JL	249	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	250	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	251
	252	#define CONFIG_SYS_INIT_SP_OFFSET \
	253	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	254	#define CONFIG_SYS_INIT_SP_ADDR \
	255	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	256
	257	/* FLASH and environment organization */
	258	#define CONFIG_SYS_NO_FLASH
	259
913b321a EN	260	#define CONFIG_ENV_SIZE (8 * 1024)
913b321a EN	261
bc5833c4	262	#define CONFIG_ENV_IS_IN_MMC
913b321a EN	263	/* #define CONFIG_ENV_IS_IN_SPI_FLASH */
	264
	265	#if defined(CONFIG_ENV_IS_IN_MMC)
	266	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
	267	#define CONFIG_SYS_MMC_ENV_DEV 0
	268	#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
	269	#define CONFIG_ENV_OFFSET (768 * 1024)
	270	#define CONFIG_ENV_SECT_SIZE (8 * 1024)
	271	#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
	272	#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
	273	#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
	274	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	275	#endif
bc5833c4 JL	276
bc5833c4 JL	277	#define CONFIG_OF_LIBFDT
5fbfd1c2	278	#define CONFIG_CMD_BOOTZ
bc5833c4	279
66b4170b EN	280	#ifndef CONFIG_SYS_DCACHE_OFF
	281	#define CONFIG_CMD_CACHE
	282	#endif
	283
f5cdc117	284	#endif /* __CONFIG_H */