projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7891e258 FE |
1 | /* |
| 2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
| 3 | * | |
| 4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | |
| 5 | * | |
| 1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7891e258 FE |
7 | */ |
| 8 | ||
| bcfc7118 FE |
9 | #ifndef __MX6QSABRESD_CONFIG_H |
| 10 | #define __MX6QSABRESD_CONFIG_H | |
| 7891e258 | 11 | |
| 1558200a | 12 | #ifdef CONFIG_SPL |
| 1558200a JT |
13 | #include "imx6_spl.h" |
| 14 | #endif | |
| 15 | ||
| 7891e258 | 16 | #define CONFIG_MACH_TYPE 3980 |
| bcfc7118 | 17 | #define CONFIG_MXC_UART_BASE UART1_BASE |
| 12ca05a3 | 18 | #define CONSOLE_DEV "ttymxc0" |
| 903e779c | 19 | #define CONFIG_MMCROOT "/dev/mmcblk1p2" |
| 7891e258 | 20 | |
| 03ce3302 OS |
21 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
| 22 | ||
| c1747970 | 23 | #include "mx6sabre_common.h" |
| 51535d9f | 24 | |
| d96796ca | 25 | /* Falcon Mode */ |
| dec30306 TR |
26 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" |
| 27 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
| d96796ca | 28 | #define CONFIG_CMD_SPL |
| d96796ca DD |
29 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 |
| 30 | #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) | |
| 31 | ||
| 32 | /* Falcon Mode - MMC support: args@1MB kernel@2MB */ | |
| 33 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ | |
| 34 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) | |
| 35 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ | |
| 36 | ||
| de7d02ae SG |
37 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
| 38 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
| acbb4457 | 39 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ |
| de7d02ae SG |
40 | #endif |
| 41 | ||
| e919aa23 MV |
42 | #define CONFIG_CMD_PCI |
| 43 | #ifdef CONFIG_CMD_PCI | |
| e919aa23 MV |
44 | #define CONFIG_PCI_SCAN_SHOW |
| 45 | #define CONFIG_PCIE_IMX | |
| 46 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | |
| 47 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) | |
| 48 | #endif | |
| 49 | ||
| 66ca09fc | 50 | /* I2C Configs */ |
| 66ca09fc FE |
51 | #define CONFIG_SYS_I2C |
| 52 | #define CONFIG_SYS_I2C_MXC | |
| 03544c66 AA |
53 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| 54 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
| f8cb101e | 55 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
| 66ca09fc FE |
56 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 57 | ||
| 58 | /* PMIC */ | |
| 59 | #define CONFIG_POWER | |
| 60 | #define CONFIG_POWER_I2C | |
| 61 | #define CONFIG_POWER_PFUZE100 | |
| 62 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
| 63 | ||
| 5a3d63c5 | 64 | /* USB Configs */ |
| 5a3d63c5 PF |
65 | #ifdef CONFIG_CMD_USB |
| 66 | #define CONFIG_USB_EHCI | |
| 67 | #define CONFIG_USB_EHCI_MX6 | |
| 5a3d63c5 PF |
68 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 69 | #define CONFIG_USB_HOST_ETHER | |
| 70 | #define CONFIG_USB_ETHER_ASIX | |
| 71 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
| 72 | #define CONFIG_MXC_USB_FLAGS 0 | |
| 73 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ | |
| 74 | #endif | |
| 75 | ||
| bcfc7118 | 76 | #endif /* __MX6QSABRESD_CONFIG_H */ |