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Commit | Line | Data |
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7891e258 FE |
1 | /* |
2 | * Copyright (C) 2012 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX6Q SabreSD board. | |
5 | * | |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
7891e258 FE |
7 | */ |
8 | ||
258f76fd FE |
9 | #ifndef __MX6SABRESD_CONFIG_H |
10 | #define __MX6SABRESD_CONFIG_H | |
7891e258 | 11 | |
1558200a | 12 | #ifdef CONFIG_SPL |
1558200a JT |
13 | #include "imx6_spl.h" |
14 | #endif | |
15 | ||
7891e258 | 16 | #define CONFIG_MACH_TYPE 3980 |
bcfc7118 | 17 | #define CONFIG_MXC_UART_BASE UART1_BASE |
12ca05a3 | 18 | #define CONSOLE_DEV "ttymxc0" |
7891e258 | 19 | |
03ce3302 OS |
20 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ |
21 | ||
c1747970 | 22 | #include "mx6sabre_common.h" |
51535d9f | 23 | |
d96796ca | 24 | /* Falcon Mode */ |
dec30306 TR |
25 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" |
26 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
d96796ca | 27 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 |
d96796ca DD |
28 | |
29 | /* Falcon Mode - MMC support: args@1MB kernel@2MB */ | |
30 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ | |
31 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) | |
32 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ | |
33 | ||
de7d02ae SG |
34 | #define CONFIG_SYS_FSL_USDHC_NUM 3 |
35 | #if defined(CONFIG_ENV_IS_IN_MMC) | |
acbb4457 | 36 | #define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */ |
de7d02ae SG |
37 | #endif |
38 | ||
e919aa23 | 39 | #ifdef CONFIG_CMD_PCI |
e919aa23 MV |
40 | #define CONFIG_PCI_SCAN_SHOW |
41 | #define CONFIG_PCIE_IMX | |
42 | #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) | |
43 | #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19) | |
44 | #endif | |
45 | ||
66ca09fc | 46 | /* I2C Configs */ |
66ca09fc FE |
47 | #define CONFIG_SYS_I2C |
48 | #define CONFIG_SYS_I2C_MXC | |
03544c66 AA |
49 | #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
50 | #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ | |
f8cb101e | 51 | #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
66ca09fc FE |
52 | #define CONFIG_SYS_I2C_SPEED 100000 |
53 | ||
54 | /* PMIC */ | |
55 | #define CONFIG_POWER | |
56 | #define CONFIG_POWER_I2C | |
57 | #define CONFIG_POWER_PFUZE100 | |
58 | #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 | |
59 | ||
5a3d63c5 | 60 | /* USB Configs */ |
5a3d63c5 | 61 | #ifdef CONFIG_CMD_USB |
5a3d63c5 | 62 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
5a3d63c5 PF |
63 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
64 | #define CONFIG_MXC_USB_FLAGS 0 | |
65 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */ | |
66 | #endif | |
67 | ||
258f76fd | 68 | #endif /* __MX6SABRESD_CONFIG_H */ |