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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6SL EVK board.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
a6bbee66 12#include "mx6_common.h"
57ca432f 13
e7d3b21b 14#ifdef CONFIG_SPL
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15#include "imx6_spl.h"
16#endif
17
92a1babf 18#define CONFIG_MACH_TYPE MACH_TYPE_MX6SL_EVK
57ca432f 19
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20/* Size of malloc() pool */
21#define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
22
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23#define CONFIG_MXC_UART
24#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
25
26/* MMC Configs */
08129d61 27#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
57ca432f 28
c8200905 29/* I2C Configs */
c8200905 30#define CONFIG_SYS_I2C_MXC
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31#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f8cb101e 33#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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34#define CONFIG_SYS_I2C_SPEED 100000
35
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36#define CONFIG_FEC_MXC
37#define CONFIG_MII
38#define IMX_FEC_BASE ENET_BASE_ADDR
39#define CONFIG_FEC_XCV_TYPE RMII
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40#define CONFIG_FEC_MXC_PHYADDR 0
41
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42#define CONFIG_PHY_SMSC
43
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44#define CONFIG_EXTRA_ENV_SETTINGS \
45 "script=boot.scr\0" \
8e184a53 46 "image=zImage\0" \
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47 "console=ttymxc0\0" \
48 "fdt_high=0xffffffff\0" \
49 "initrd_high=0xffffffff\0" \
50 "fdt_file=imx6sl-evk.dtb\0" \
6fc049be 51 "fdt_addr=0x88000000\0" \
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52 "boot_fdt=try\0" \
53 "ip_dyn=yes\0" \
adc5a667 54 "mmcdev=1\0" \
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55 "mmcpart=1\0" \
56 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
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57 "mmcargs=setenv bootargs console=${console},${baudrate} " \
58 "root=${mmcroot}\0" \
59 "loadbootscript=" \
60 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
61 "bootscript=echo Running bootscript from mmc ...; " \
62 "source\0" \
8e184a53 63 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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64 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
65 "mmcboot=echo Booting from mmc ...; " \
66 "run mmcargs; " \
67 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
68 "if run loadfdt; then " \
8e184a53 69 "bootz ${loadaddr} - ${fdt_addr}; " \
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70 "else " \
71 "if test ${boot_fdt} = try; then " \
8e184a53 72 "bootz; " \
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73 "else " \
74 "echo WARN: Cannot load the DT; " \
75 "fi; " \
76 "fi; " \
77 "else " \
8e184a53 78 "bootz; " \
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79 "fi;\0" \
80 "netargs=setenv bootargs console=${console},${baudrate} " \
81 "root=/dev/nfs " \
82 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
83 "netboot=echo Booting from net ...; " \
84 "run netargs; " \
85 "if test ${ip_dyn} = yes; then " \
86 "setenv get_cmd dhcp; " \
87 "else " \
88 "setenv get_cmd tftp; " \
89 "fi; " \
8e184a53 90 "${get_cmd} ${image}; " \
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91 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
92 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
8e184a53 93 "bootz ${loadaddr} - ${fdt_addr}; " \
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94 "else " \
95 "if test ${boot_fdt} = try; then " \
8e184a53 96 "bootz; " \
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97 "else " \
98 "echo WARN: Cannot load the DT; " \
99 "fi; " \
100 "fi; " \
101 "else " \
8e184a53 102 "bootz; " \
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103 "fi;\0"
104
105#define CONFIG_BOOTCOMMAND \
106 "mmc dev ${mmcdev};" \
107 "mmc dev ${mmcdev}; if mmc rescan; then " \
108 "if run loadbootscript; then " \
109 "run bootscript; " \
110 "else " \
8e184a53 111 "if run loadimage; then " \
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112 "run mmcboot; " \
113 "else run netboot; " \
114 "fi; " \
115 "fi; " \
116 "else run netboot; fi"
117
118/* Miscellaneous configurable options */
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119#define CONFIG_SYS_MEMTEST_START 0x80000000
120#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + SZ_512M)
121
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122/* Physical Memory Map */
123#define CONFIG_NR_DRAM_BANKS 1
124#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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125
126#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
127#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
128#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
129
130#define CONFIG_SYS_INIT_SP_OFFSET \
131 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
132#define CONFIG_SYS_INIT_SP_ADDR \
133 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
134
056845c2 135/* Environment organization */
57ca432f 136#define CONFIG_ENV_SIZE SZ_8K
be2fde60 137
6b2781f6 138#if defined CONFIG_SPI_BOOT
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139#define CONFIG_ENV_OFFSET (768 * 1024)
140#define CONFIG_ENV_SECT_SIZE (64 * 1024)
141#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
142#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
143#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
144#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
145#else
0da040bf 146#define CONFIG_ENV_OFFSET (8 * SZ_64K)
be2fde60 147#endif
57ca432f 148
694c3bc1 149#ifdef CONFIG_CMD_SF
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150#define CONFIG_MXC_SPI
151#define CONFIG_SF_DEFAULT_BUS 0
155fa9af 152#define CONFIG_SF_DEFAULT_CS 0
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153#define CONFIG_SF_DEFAULT_SPEED 20000000
154#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
155#endif
156
3b9c1a5d 157/* USB Configs */
3b9c1a5d 158#ifdef CONFIG_CMD_USB
3b9c1a5d 159#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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160#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
161#define CONFIG_MXC_USB_FLAGS 0
162#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
163#endif
164
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165#define CONFIG_SYS_FSL_USDHC_NUM 3
166#if defined(CONFIG_ENV_IS_IN_MMC)
167#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC2*/
168#endif
169
1368f993 170#define CONFIG_IMX_THERMAL
27d36080 171
57ca432f 172#endif /* __CONFIG_H */