[people/ms/u-boot.git] / include / configs / mx6ul_14x14_evk.h

/*
 * Copyright (C) 2015 Freescale Semiconductor, Inc.
 *
 * Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef __MX6UL_14X14_EVK_CONFIG_H
#define __MX6UL_14X14_EVK_CONFIG_H

#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#include "mx6_common.h"
#include <asm/imx-common/gpio.h>

#define is_mx6ul_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)

/* SPL options */
#include "imx6_spl.h"

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)

#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

/* MMC Configs */
#ifdef CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* NAND pin conflicts with usdhc2 */
#ifdef CONFIG_NAND_MXS
#define CONFIG_SYS_FSL_USDHC_NUM	1
#else
#define CONFIG_SYS_FSL_USDHC_NUM	2
#endif

#endif

/* I2C configs */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED		100000

/* PMIC only for 9X9 EVK */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_PFUZE3000
#define CONFIG_POWER_PFUZE3000_I2C_ADDR  0x08
#endif

#define CONFIG_SYS_MMC_IMG_LOAD_PART	1

#define CONFIG_EXTRA_ENV_SETTINGS \
	"script=boot.scr\0" \
	"image=zImage\0" \
	"console=ttymxc0\0" \
	"fdt_high=0xffffffff\0" \
	"initrd_high=0xffffffff\0" \
	"fdt_file=undefined\0" \
	"fdt_addr=0x83000000\0" \
	"boot_fdt=try\0" \
	"ip_dyn=yes\0" \
	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcroot}\0" \
	"loadbootscript=" \
		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if run loadfdt; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
	"netargs=setenv bootargs console=${console},${baudrate} " \
		"root=/dev/nfs " \
	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
		"netboot=echo Booting from net ...; " \
		"run netargs; " \
		"if test ${ip_dyn} = yes; then " \
			"setenv get_cmd dhcp; " \
		"else " \
			"setenv get_cmd tftp; " \
		"fi; " \
		"${get_cmd} ${image}; " \
		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
				"bootz ${loadaddr} - ${fdt_addr}; " \
			"else " \
				"if test ${boot_fdt} = try; then " \
					"bootz; " \
				"else " \
					"echo WARN: Cannot load the DT; " \
				"fi; " \
			"fi; " \
		"else " \
			"bootz; " \
		"fi;\0" \
		"findfdt="\
			"if test $fdt_file = undefined; then " \
				"if test $board_name = EVK && test $board_rev = 9X9; then " \
					"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
				"if test $board_name = EVK && test $board_rev = 14X14; then " \
					"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
				"if test $fdt_file = undefined; then " \
					"echo WARNING: Could not determine dtb to use; fi; " \
			"fi;\0" \

#define CONFIG_BOOTCOMMAND \
	   "run findfdt;" \
	   "mmc dev ${mmcdev};" \
	   "mmc dev ${mmcdev}; if mmc rescan; then " \
		   "if run loadbootscript; then " \
			   "run bootscript; " \
		   "else " \
			   "if run loadimage; then " \
				   "run mmcboot; " \
			   "else run netboot; " \
			   "fi; " \
		   "fi; " \
	   "else run netboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ			1000

#define CONFIG_CMDLINE_EDITING
#define CONFIG_STACKSIZE		SZ_128K

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* FLASH and environment organization */
#define CONFIG_SYS_NO_FLASH

#define CONFIG_ENV_SIZE			SZ_8K
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_ENV_OFFSET		(8 * SZ_64K)
#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
#define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */

#define CONFIG_CMD_BMODE

#ifndef CONFIG_SYS_DCACHE_OFF
#endif

#ifdef CONFIG_FSL_QSPI
#define CONFIG_SF_DEFAULT_BUS		0
#define CONFIG_SF_DEFAULT_CS		0
#define CONFIG_SF_DEFAULT_SPEED	40000000
#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
#define FSL_QSPI_FLASH_NUM		1
#define FSL_QSPI_FLASH_SIZE		SZ_32M
#endif

/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_MX6
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS   0
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif

#ifdef CONFIG_CMD_NET
#define CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_ENET_DEV		1

#if (CONFIG_FEC_ENET_DEV == 0)
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR          0x2
#define CONFIG_FEC_XCV_TYPE             RMII
#elif (CONFIG_FEC_ENET_DEV == 1)
#define IMX_FEC_BASE			ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR		0x1
#define CONFIG_FEC_XCV_TYPE		RMII
#endif
#define CONFIG_ETHPRIME			"FEC"

#define CONFIG_PHYLIB
#define CONFIG_PHY_MICREL
#endif

#define CONFIG_IMX_THERMAL

#ifndef CONFIG_SPL_BUILD
#ifdef CONFIG_VIDEO
#define CONFIG_VIDEO_MXS
#define CONFIG_VIDEO_LOGO
#define CONFIG_SPLASH_SCREEN
#define CONFIG_SPLASH_SCREEN_ALIGN
#define CONFIG_CMD_BMP
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_BMP_RLE8
#define CONFIG_VIDEO_BMP_LOGO
#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
#endif
#endif

#endif
Commit	Line	Data
f0ff57b0 PF	1	/*
	2	* Copyright (C) 2015 Freescale Semiconductor, Inc.
	3	*
	4	* Configuration settings for the Freescale i.MX6UL 14x14 EVK board.
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8	#ifndef __MX6UL_14X14_EVK_CONFIG_H
	9	#define __MX6UL_14X14_EVK_CONFIG_H
	10
f0ff57b0 PF	11	#include <asm/arch/imx-regs.h>
	12	#include <linux/sizes.h>
	13	#include "mx6_common.h"
	14	#include <asm/imx-common/gpio.h>
	15
d9cbb264 PF	16	#define is_mx6ul_9x9_evk() CONFIG_IS_ENABLED(TARGET_MX6UL_9X9_EVK)
d9cbb264 PF	17
f0ff57b0	18	/* SPL options */
f0ff57b0 PF	19	#include "imx6_spl.h"
f0ff57b0 PF	20
d9cbb264 PF	21	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
d9cbb264 PF	22
f0ff57b0 PF	23	/* Size of malloc() pool */
	24	#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M)
	25
	26	#define CONFIG_BOARD_EARLY_INIT_F
f0ff57b0 PF	27
	28	#define CONFIG_MXC_UART
	29	#define CONFIG_MXC_UART_BASE UART1_BASE
	30
f0ff57b0 PF	31	/* MMC Configs */
	32	#ifdef CONFIG_FSL_USDHC
	33	#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
	34
	35	/* NAND pin conflicts with usdhc2 */
	36	#ifdef CONFIG_NAND_MXS
	37	#define CONFIG_SYS_FSL_USDHC_NUM 1
	38	#else
	39	#define CONFIG_SYS_FSL_USDHC_NUM 2
	40	#endif
	41
f0ff57b0 PF	42	#endif
f0ff57b0 PF	43
f0ff57b0	44	/* I2C configs */
f0ff57b0 PF	45	#ifdef CONFIG_CMD_I2C
	46	#define CONFIG_SYS_I2C
	47	#define CONFIG_SYS_I2C_MXC
03544c66 AA	48	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	49	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
f0ff57b0	50	#define CONFIG_SYS_I2C_SPEED 100000
f0ff57b0	51
d9cbb264 PF	52	/* PMIC only for 9X9 EVK */
	53	#define CONFIG_POWER
	54	#define CONFIG_POWER_I2C
	55	#define CONFIG_POWER_PFUZE3000
	56	#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
	57	#endif
f0ff57b0	58
f0ff57b0 PF	59	#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
	60
	61	#define CONFIG_EXTRA_ENV_SETTINGS \
	62	"script=boot.scr\0" \
	63	"image=zImage\0" \
	64	"console=ttymxc0\0" \
	65	"fdt_high=0xffffffff\0" \
	66	"initrd_high=0xffffffff\0" \
d9cbb264	67	"fdt_file=undefined\0" \
f0ff57b0 PF	68	"fdt_addr=0x83000000\0" \
	69	"boot_fdt=try\0" \
	70	"ip_dyn=yes\0" \
df674904	71	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
f0ff57b0 PF	72	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	73	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	74	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
	75	"mmcautodetect=yes\0" \
	76	"mmcargs=setenv bootargs console=${console},${baudrate} " \
	77	"root=${mmcroot}\0" \
	78	"loadbootscript=" \
	79	"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
	80	"bootscript=echo Running bootscript from mmc ...; " \
	81	"source\0" \
	82	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	83	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
	84	"mmcboot=echo Booting from mmc ...; " \
	85	"run mmcargs; " \
	86	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	87	"if run loadfdt; then " \
	88	"bootz ${loadaddr} - ${fdt_addr}; " \
	89	"else " \
	90	"if test ${boot_fdt} = try; then " \
	91	"bootz; " \
	92	"else " \
	93	"echo WARN: Cannot load the DT; " \
	94	"fi; " \
	95	"fi; " \
	96	"else " \
	97	"bootz; " \
	98	"fi;\0" \
	99	"netargs=setenv bootargs console=${console},${baudrate} " \
	100	"root=/dev/nfs " \
	101	"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
	102	"netboot=echo Booting from net ...; " \
	103	"run netargs; " \
	104	"if test ${ip_dyn} = yes; then " \
	105	"setenv get_cmd dhcp; " \
	106	"else " \
	107	"setenv get_cmd tftp; " \
	108	"fi; " \
	109	"${get_cmd} ${image}; " \
	110	"if test ${boot_fdt} = yes \|\| test ${boot_fdt} = try; then " \
	111	"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
	112	"bootz ${loadaddr} - ${fdt_addr}; " \
	113	"else " \
	114	"if test ${boot_fdt} = try; then " \
	115	"bootz; " \
	116	"else " \
	117	"echo WARN: Cannot load the DT; " \
	118	"fi; " \
	119	"fi; " \
	120	"else " \
	121	"bootz; " \
d9cbb264 PF	122	"fi;\0" \
	123	"findfdt="\
	124	"if test $fdt_file = undefined; then " \
	125	"if test $board_name = EVK && test $board_rev = 9X9; then " \
	126	"setenv fdt_file imx6ul-9x9-evk.dtb; fi; " \
	127	"if test $board_name = EVK && test $board_rev = 14X14; then " \
	128	"setenv fdt_file imx6ul-14x14-evk.dtb; fi; " \
	129	"if test $fdt_file = undefined; then " \
	130	"echo WARNING: Could not determine dtb to use; fi; " \
	131	"fi;\0" \
f0ff57b0 PF	132
f0ff57b0 PF	133	#define CONFIG_BOOTCOMMAND \
d9cbb264	134	"run findfdt;" \
f0ff57b0 PF	135	"mmc dev ${mmcdev};" \
	136	"mmc dev ${mmcdev}; if mmc rescan; then " \
	137	"if run loadbootscript; then " \
	138	"run bootscript; " \
	139	"else " \
	140	"if run loadimage; then " \
	141	"run mmcboot; " \
	142	"else run netboot; " \
	143	"fi; " \
	144	"fi; " \
	145	"else run netboot; fi"
	146
	147	/* Miscellaneous configurable options */
f0ff57b0	148	#define CONFIG_SYS_MEMTEST_START 0x80000000
65806cc7	149	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000)
f0ff57b0 PF	150
	151	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
	152	#define CONFIG_SYS_HZ 1000
	153
	154	#define CONFIG_CMDLINE_EDITING
	155	#define CONFIG_STACKSIZE SZ_128K
	156
	157	/* Physical Memory Map */
	158	#define CONFIG_NR_DRAM_BANKS 1
	159	#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
	160
	161	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	162	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	163	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	164
	165	#define CONFIG_SYS_INIT_SP_OFFSET \
	166	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	167	#define CONFIG_SYS_INIT_SP_ADDR \
	168	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	169
	170	/* FLASH and environment organization */
	171	#define CONFIG_SYS_NO_FLASH
	172
	173	#define CONFIG_ENV_SIZE SZ_8K
	174	#define CONFIG_ENV_IS_IN_MMC
	175	#define CONFIG_ENV_OFFSET (8 * SZ_64K)
	176	#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
	177	#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
	178	#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
	179
f0ff57b0 PF	180	#define CONFIG_CMD_BMODE
	181
	182	#ifndef CONFIG_SYS_DCACHE_OFF
f0ff57b0 PF	183	#endif
f0ff57b0 PF	184
f0ff57b0	185	#ifdef CONFIG_FSL_QSPI
f0ff57b0 PF	186	#define CONFIG_SF_DEFAULT_BUS 0
	187	#define CONFIG_SF_DEFAULT_CS 0
	188	#define CONFIG_SF_DEFAULT_SPEED 40000000
	189	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
	190	#define FSL_QSPI_FLASH_NUM 1
	191	#define FSL_QSPI_FLASH_SIZE SZ_32M
	192	#endif
	193
	194	/* USB Configs */
f0ff57b0 PF	195	#ifdef CONFIG_CMD_USB
	196	#define CONFIG_USB_EHCI
	197	#define CONFIG_USB_EHCI_MX6
f0ff57b0 PF	198	#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
	199	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	200	#define CONFIG_MXC_USB_FLAGS 0
	201	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
	202	#endif
	203
0d4cdb56 PF	204	#ifdef CONFIG_CMD_NET
	205	#define CONFIG_FEC_MXC
	206	#define CONFIG_MII
	207	#define CONFIG_FEC_ENET_DEV 1
	208
	209	#if (CONFIG_FEC_ENET_DEV == 0)
	210	#define IMX_FEC_BASE ENET_BASE_ADDR
	211	#define CONFIG_FEC_MXC_PHYADDR 0x2
	212	#define CONFIG_FEC_XCV_TYPE RMII
	213	#elif (CONFIG_FEC_ENET_DEV == 1)
	214	#define IMX_FEC_BASE ENET2_BASE_ADDR
	215	#define CONFIG_FEC_MXC_PHYADDR 0x1
	216	#define CONFIG_FEC_XCV_TYPE RMII
	217	#endif
	218	#define CONFIG_ETHPRIME "FEC"
	219
	220	#define CONFIG_PHYLIB
	221	#define CONFIG_PHY_MICREL
0d4cdb56 PF	222	#endif
0d4cdb56 PF	223
1368f993	224	#define CONFIG_IMX_THERMAL
f0ff57b0	225
ce2190f5	226	#ifndef CONFIG_SPL_BUILD
df674904	227	#ifdef CONFIG_VIDEO
df674904 PF	228	#define CONFIG_VIDEO_MXS
df674904 PF	229	#define CONFIG_VIDEO_LOGO
df674904 PF	230	#define CONFIG_SPLASH_SCREEN
	231	#define CONFIG_SPLASH_SCREEN_ALIGN
	232	#define CONFIG_CMD_BMP
	233	#define CONFIG_BMP_16BPP
	234	#define CONFIG_VIDEO_BMP_RLE8
	235	#define CONFIG_VIDEO_BMP_LOGO
	236	#define MXS_LCDIF_BASE MX6UL_LCDIF1_BASE_ADDR
	237	#endif
ce2190f5	238	#endif
df674904	239
f0ff57b0	240	#endif