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1 | /* |
2 | * Copyright (C) 2015 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX7. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __MX7_COMMON_H | |
10 | #define __MX7_COMMON_H | |
11 | ||
12 | #include <linux/sizes.h> | |
13 | #include <asm/arch/imx-regs.h> | |
552a848e | 14 | #include <asm/mach-imx/gpio.h> |
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15 | |
16 | #ifndef CONFIG_MX7 | |
17 | #define CONFIG_MX7 | |
18 | #endif | |
19 | ||
20 | /* Timer settings */ | |
21 | #define CONFIG_MXC_GPT_HCLK | |
1a8150d4 | 22 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ |
e4916e85 | 23 | #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK |
18fb0e3c | 24 | #define CONFIG_SYS_FSL_CLK |
1a8150d4 | 25 | |
1ecd2eaa PF |
26 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
27 | ||
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28 | /* Enable iomux-lpsr support */ |
29 | #define CONFIG_IOMUX_LPSR | |
1a8150d4 | 30 | |
1a8150d4 | 31 | #define CONFIG_LOADADDR 0x80800000 |
1a8150d4 | 32 | |
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33 | /* allow to overwrite serial and ethaddr */ |
34 | #define CONFIG_ENV_OVERWRITE | |
35 | #define CONFIG_CONS_INDEX 1 | |
1a8150d4 | 36 | |
1a8150d4 | 37 | /* Miscellaneous configurable options */ |
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38 | #define CONFIG_SYS_CBSIZE 512 |
39 | #define CONFIG_SYS_MAXARGS 32 | |
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40 | |
41 | #ifndef CONFIG_SYS_DCACHE_OFF | |
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42 | #endif |
43 | ||
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44 | /* UART */ |
45 | #define CONFIG_MXC_UART | |
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46 | |
47 | /* MMC */ | |
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48 | #define CONFIG_BOUNCE_BUFFER |
49 | #define CONFIG_FSL_ESDHC | |
50 | #define CONFIG_FSL_USDHC | |
51 | ||
52 | /* Fuses */ | |
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53 | #define CONFIG_MXC_OCOTP |
54 | ||
90ab4be1 | 55 | #define CONFIG_ARMV7_SECURE_BASE 0x00900000 |
90ab4be1 | 56 | |
0ec3d98f AH |
57 | #define CONFIG_ARMV7_PSCI_1_0 |
58 | ||
e6672392 GB |
59 | /* Secure boot (HAB) support */ |
60 | #ifdef CONFIG_SECURE_BOOT | |
61 | #define CONFIG_CSF_SIZE 0x2000 | |
e6672392 GB |
62 | #endif |
63 | ||
1a8150d4 | 64 | #endif |