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1 | /* |
2 | * Copyright (C) 2016 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX7ULP EVK board. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __MX7ULP_EVK_CONFIG_H | |
10 | #define __MX7ULP_EVK_CONFIG_H | |
11 | ||
12 | #include <linux/sizes.h> | |
13 | #include <asm/arch/imx-regs.h> | |
14 | ||
15 | /*Uncomment it to use secure boot*/ | |
16 | /*#define CONFIG_SECURE_BOOT*/ | |
17 | ||
18 | #ifdef CONFIG_SECURE_BOOT | |
19 | #ifndef CONFIG_CSF_SIZE | |
20 | #define CONFIG_CSF_SIZE 0x4000 | |
21 | #endif | |
22 | #endif | |
23 | ||
24 | #define CONFIG_BOARD_POSTCLK_INIT | |
25 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 | |
26 | ||
27 | #define SRC_BASE_ADDR CMC1_RBASE | |
28 | #define IRAM_BASE_ADDR OCRAM_0_BASE | |
29 | #define IOMUXC_BASE_ADDR IOMUXC1_RBASE | |
30 | ||
04cb0d3e PF |
31 | #define CONFIG_BOUNCE_BUFFER |
32 | #define CONFIG_FSL_ESDHC | |
33 | #define CONFIG_FSL_USDHC | |
34 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ | |
35 | ||
36 | #define CONFIG_SYS_FSL_USDHC_NUM 1 | |
37 | ||
38 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
39 | #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ | |
40 | #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ | |
41 | #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ | |
42 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
43 | ||
44 | #define CONFIG_ENV_OFFSET (12 * SZ_64K) | |
77fa0457 PF |
45 | #define CONFIG_ENV_SIZE SZ_8K |
46 | ||
77fa0457 PF |
47 | /* Using ULP WDOG for reset */ |
48 | #define WDOG_BASE_ADDR WDG1_RBASE | |
49 | ||
50 | #define CONFIG_SYS_ARCH_TIMER | |
51 | #define CONFIG_SYS_HZ_CLOCK 1000000 /* Fixed at 1Mhz from TSTMR */ | |
52 | ||
53 | #define CONFIG_INITRD_TAG | |
54 | #define CONFIG_CMDLINE_TAG | |
55 | #define CONFIG_SETUP_MEMORY_TAGS | |
56 | /*#define CONFIG_REVISION_TAG*/ | |
57 | ||
58 | /* Size of malloc() pool */ | |
59 | #define CONFIG_SYS_MALLOC_LEN (8 * SZ_1M) | |
60 | ||
61 | #define CONFIG_BOARD_EARLY_INIT_F | |
62 | ||
63 | /* UART */ | |
64 | #define LPUART_BASE LPUART4_RBASE | |
65 | ||
66 | /* allow to overwrite serial and ethaddr */ | |
67 | #define CONFIG_ENV_OVERWRITE | |
68 | #define CONFIG_CONS_INDEX 1 | |
69 | #define CONFIG_BAUDRATE 115200 | |
70 | ||
77fa0457 PF |
71 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
72 | ||
73 | /* Miscellaneous configurable options */ | |
74 | #define CONFIG_SYS_PROMPT "=> " | |
75 | #define CONFIG_SYS_CBSIZE 512 | |
76 | ||
77fa0457 | 77 | #define CONFIG_SYS_MAXARGS 256 |
77fa0457 | 78 | |
77fa0457 PF |
79 | /* Physical Memory Map */ |
80 | #define CONFIG_NR_DRAM_BANKS 1 | |
81 | ||
77fa0457 PF |
82 | #define PHYS_SDRAM 0x60000000 |
83 | #define PHYS_SDRAM_SIZE SZ_1G | |
84 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM | |
85 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
77fa0457 PF |
86 | |
87 | #define CONFIG_LOADADDR 0x60800000 | |
88 | ||
89 | #define CONFIG_CMD_MEMTEST | |
90 | #define CONFIG_SYS_MEMTEST_END 0x9E000000 | |
91 | ||
04cb0d3e PF |
92 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
93 | "script=boot.scr\0" \ | |
94 | "image=zImage\0" \ | |
95 | "console=ttyLP0\0" \ | |
96 | "fdt_high=0xffffffff\0" \ | |
97 | "initrd_high=0xffffffff\0" \ | |
98 | "fdt_file=imx7ulp-evk.dtb\0" \ | |
99 | "fdt_addr=0x63000000\0" \ | |
100 | "boot_fdt=try\0" \ | |
101 | "earlycon=lpuart32,0x402D0010\0" \ | |
102 | "ip_dyn=yes\0" \ | |
103 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | |
104 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | |
105 | "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ | |
106 | "mmcautodetect=yes\0" \ | |
107 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
108 | "root=${mmcroot}\0" \ | |
109 | "loadbootscript=" \ | |
110 | "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ | |
111 | "bootscript=echo Running bootscript from mmc ...; " \ | |
112 | "source\0" \ | |
113 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
114 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
115 | "mmcboot=echo Booting from mmc ...; " \ | |
116 | "run mmcargs; " \ | |
117 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
118 | "if run loadfdt; then " \ | |
119 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
120 | "else " \ | |
121 | "if test ${boot_fdt} = try; then " \ | |
122 | "bootz; " \ | |
123 | "else " \ | |
124 | "echo WARN: Cannot load the DT; " \ | |
125 | "fi; " \ | |
126 | "fi; " \ | |
127 | "else " \ | |
128 | "bootz; " \ | |
129 | "fi;\0" \ | |
130 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
131 | "root=/dev/nfs " \ | |
132 | "ip=:::::eth0:dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
133 | "netboot=echo Booting from net ...; " \ | |
134 | "run netargs; " \ | |
135 | "if test ${ip_dyn} = yes; then " \ | |
136 | "setenv get_cmd dhcp; " \ | |
137 | "else " \ | |
138 | "setenv get_cmd tftp; " \ | |
139 | "fi; " \ | |
140 | "usb start; "\ | |
141 | "${get_cmd} ${image}; " \ | |
142 | "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ | |
143 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
144 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
145 | "else " \ | |
146 | "if test ${boot_fdt} = try; then " \ | |
147 | "bootz; " \ | |
148 | "else " \ | |
149 | "echo WARN: Cannot load the DT; " \ | |
150 | "fi; " \ | |
151 | "fi; " \ | |
152 | "else " \ | |
153 | "bootz; " \ | |
154 | "fi;\0" \ | |
155 | ||
156 | #define CONFIG_BOOTCOMMAND \ | |
157 | "mmc dev ${mmcdev}; if mmc rescan; then " \ | |
158 | "if run loadbootscript; then " \ | |
159 | "run bootscript; " \ | |
160 | "else " \ | |
161 | "if run loadimage; then " \ | |
162 | "run mmcboot; " \ | |
163 | "fi; " \ | |
164 | "fi; " \ | |
165 | "fi" | |
166 | ||
77fa0457 PF |
167 | #define CONFIG_SYS_HZ 1000 |
168 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
169 | ||
170 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
171 | #define CONFIG_SYS_INIT_RAM_SIZE SZ_256K | |
172 | ||
173 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
174 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
175 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
176 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
177 | ||
178 | #ifndef CONFIG_SYS_DCACHE_OFF | |
179 | #define CONFIG_CMD_CACHE | |
180 | #endif | |
181 | ||
182 | #endif /* __CONFIG_H */ |