[people/ms/u-boot.git] / include / configs / nokia_rx51.h

/*
 * (C) Copyright 2011-2012
 * Pali Rohár <pali.rohar@gmail.com>
 *
 * (C) Copyright 2010
 * Alistair Buxton <a.j.buxton@gmail.com>
 *
 * Derived from Beagle Board code:
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 *
 * Configuration settings for the Nokia RX-51 aka N900.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_SYS_L2CACHE_OFF		/* pretend there is no L2 CACHE */

#define CONFIG_MACH_TYPE		MACH_TYPE_NOKIA_RX51

/*
 * Nokia X-Loader loading secondary image to address 0x80400000
 * NOLO loading boot image to random place, so it doesn't really
 * matter what we set this to. We have to copy u-boot to this address
 */

#include <asm/arch/cpu.h>		/* get chip and board defs */
#include <asm/arch/omap.h>
#include <asm/arch/mem.h>
#include <linux/stringify.h>

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

#define CONFIG_MISC_INIT_R
#define CONFIG_SKIP_LOWLEVEL_INIT		/* X-Loader set everything up */

#define CONFIG_CMDLINE_TAG	/* enable passing kernel command line string */
#define CONFIG_INITRD_TAG			/* enable passing initrd */
#define CONFIG_REVISION_TAG			/* enable passing revision tag*/
#define CONFIG_SETUP_MEMORY_TAGS		/* enable memory tag */

/*
 * Size of malloc() pool
 */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_UBI_SIZE			(512 << 10)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
					(128 << 10))

/*
 * Hardware drivers
 */

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK		48000000		/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
#define CONFIG_SERIAL3			3		/* UART3 on RX-51 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }

/* USB device configuration */
#define CONFIG_USB_DEVICE
#define CONFIG_USBD_VENDORID		0x0421
#define CONFIG_USBD_PRODUCTID		0x01c8
#define CONFIG_USBD_MANUFACTURER	"Nokia"
#define CONFIG_USBD_PRODUCT_NAME	"N900"

/* commands to include */

#define CONFIG_CMDLINE_EDITING		/* add command line history */
#define CONFIG_AUTO_COMPLETE		/* add autocompletion support */

#define CONFIG_SYS_I2C

/*
 * TWL4030
 */
#define CONFIG_TWL4030_LED
#define CONFIG_TWL4030_KEYPAD

#define GPIO_SLIDE			71

/*
 * Board ONENAND Info.
 */

#define PART1_NAME			"bootloader"
#define PART1_SIZE			128
#define PART1_MULL			1024
#define PART1_SUFF			"k"
#define PART1_OFFS			0x00000000
#define PART1_MASK			0x00000003

#define PART2_NAME			"config"
#define PART2_SIZE			384
#define PART2_MULL			1024
#define PART2_SUFF			"k"
#define PART2_OFFS			0x00020000
#define PART2_MASK			0x00000000

#define PART3_NAME			"log"
#define PART3_SIZE			256
#define PART3_MULL			1024
#define PART3_SUFF			"k"
#define PART3_OFFS			0x00080000
#define PART3_MASK			0x00000000

#define PART4_NAME			"kernel"
#define PART4_SIZE			2
#define PART4_MULL			1024*1024
#define PART4_SUFF			"m"
#define PART4_OFFS			0x000c0000
#define PART4_MASK			0x00000000

#define PART5_NAME			"initfs"
#define PART5_SIZE			2
#define PART5_MULL			1024*1024
#define PART5_SUFF			"m"
#define PART5_OFFS			0x002c0000
#define PART5_MASK			0x00000000

#define PART6_NAME			"rootfs"
#define PART6_SIZE			257280
#define PART6_MULL			1024
#define PART6_SUFF			"k"
#define PART6_OFFS			0x004c0000
#define PART6_MASK			0x00000000

#ifdef ONENAND_SUPPORT

#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS

#endif

/* Watchdog support */
#define CONFIG_HW_WATCHDOG

/*
 * Framebuffer
 */
/* Video console */
#define CONFIG_VIDEO_LOGO
#define VIDEO_FB_16BPP_PIXEL_SWAP
#define VIDEO_FB_16BPP_WORD_SWAP
#define CONFIG_SPLASH_SCREEN

/* functions for cfb_console */
#define VIDEO_KBD_INIT_FCT		rx51_kp_init()
#define VIDEO_TSTC_FCT			rx51_kp_tstc
#define VIDEO_GETC_FCT			rx51_kp_getc
#ifndef __ASSEMBLY__
struct stdio_dev;
int rx51_kp_init(void);
int rx51_kp_tstc(struct stdio_dev *sdev);
int rx51_kp_getc(struct stdio_dev *sdev);
#endif

/* Environment information */
#ifdef CONFIG_MTDPARTS_DEFAULT
#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
#else
#define MTDPARTS
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
	MTDPARTS \
	"usbtty=cdc_acm\0" \
	"stdin=vga\0" \
	"stdout=vga\0" \
	"stderr=vga\0" \
	"setcon=setenv stdin ${con};" \
		"setenv stdout ${con};" \
		"setenv stderr ${con}\0" \
	"sercon=setenv con serial; run setcon\0" \
	"usbcon=setenv con usbtty; run setcon\0" \
	"vgacon=setenv con vga; run setcon\0" \
	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	"switchmmc=mmc dev ${mmcnum}\0" \
	"kernaddr=0x82008000\0" \
	"initrdaddr=0x84008000\0" \
	"scriptaddr=0x86008000\0" \
	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
		"${loadaddr} ${mmcfile}\0" \
	"kernload=setenv loadaddr ${kernaddr};" \
		"setenv mmcfile ${mmckernfile};" \
		"run fileload\0" \
	"initrdload=setenv loadaddr ${initrdaddr};" \
		"setenv mmcfile ${mmcinitrdfile};" \
		"run fileload\0" \
	"scriptload=setenv loadaddr ${scriptaddr};" \
		"setenv mmcfile ${mmcscriptfile};" \
		"run fileload\0" \
	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	"kernboot=echo Booting ${mmckernfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	"attachboot=echo Booting attached kernel image ...;" \
		"setenv setup_omap_atag 1;" \
		"bootm ${attkernaddr};" \
		"setenv setup_omap_atag\0" \
	"trymmcscriptboot=if run switchmmc; then " \
			"if run scriptload; then " \
				"run scriptboot;" \
			"fi;" \
		"fi\0" \
	"trymmckernboot=if run switchmmc; then " \
			"if run kernload; then " \
				"run kernboot;" \
			"fi;" \
		"fi\0" \
	"trymmckerninitrdboot=if run switchmmc; then " \
			"if run initrdload; then " \
				"if run kernload; then " \
					"run kerninitrdboot;" \
				"fi;" \
			"fi; " \
		"fi\0" \
	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
		"setenv mmckernfile uImage; run trymmckernboot\0" \
	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
		"setenv mmcpart 2; run trymmcpartboot;" \
		"setenv mmcpart 3; run trymmcpartboot;" \
		"setenv mmcpart 4; run trymmcpartboot\0" \
	"trymmcboot=if run switchmmc; then " \
			"setenv mmctype fat;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext2;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext4;" \
			"run trymmcallpartboot;" \
		"fi\0" \
	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
	"menucmd=bootmenu\0" \
	"bootmenu_0=Attached kernel=run attachboot\0" \
	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	"bootmenu_2=External SD card=run sdboot\0" \
	"bootmenu_3=U-Boot boot order=boot\0" \
	"bootmenu_delay=30\0" \
	""

#define CONFIG_PREBOOT \
	"setenv mmcnum 1; setenv mmcpart 1;" \
	"setenv mmcscriptfile bootmenu.scr;" \
	"if run switchmmc; then " \
		"setenv mmcdone true;" \
		"setenv mmctype fat;" \
		"if run scriptload; then true; else " \
			"setenv mmctype ext2;" \
			"if run scriptload; then true; else " \
				"setenv mmctype ext4;" \
				"if run scriptload; then true; else " \
					"setenv mmcdone false;" \
				"fi;" \
			"fi;" \
		"fi;" \
		"if ${mmcdone}; then " \
			"run scriptboot;" \
		"fi;" \
	"fi;" \
	"if run slide; then true; else " \
		"setenv bootmenu_delay 0;" \
		"setenv bootdelay 0;" \
	"fi"

#define CONFIG_POSTBOOTMENU \
	"echo;" \
	"echo Extra commands:;" \
	"echo run sercon - Use serial port for control.;" \
	"echo run usbcon - Use usbtty for control.;" \
	"echo run vgacon - Use framebuffer/keyboard.;" \
	"echo run sdboot - Boot from SD card slot.;" \
	"echo run emmcboot - Boot internal eMMC memory.;" \
	"echo run attachboot - Boot attached kernel image.;" \
	"echo"

#define CONFIG_BOOTCOMMAND \
	"run sdboot;" \
	"run emmcboot;" \
	"run attachboot;" \
	"echo"

#define CONFIG_MENU_SHOW

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory */

#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/

/* default load address */
#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS		2
#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0

/*
 * FLASH and environment organization
 */

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
			CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

/*
 * Attached kernel image
 */

#define SDRAM_SIZE			0x10000000	/* 256 MB */
#define SDRAM_END			(CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)

#define IMAGE_MAXSIZE			0x1FF800	/* 2 MB - 2 kB */
#define KERNEL_OFFSET			0x40000		/* 256 kB */
#define KERNEL_MAXSIZE			(IMAGE_MAXSIZE-KERNEL_OFFSET)
#define KERNEL_ADDRESS			(SDRAM_END-KERNEL_MAXSIZE)

/* Reserve protected RAM for attached kernel */
#define CONFIG_PRAM			((KERNEL_MAXSIZE >> 10)+1)

#endif /* __CONFIG_H */
Commit	Line	Data
ed407be5 PR	1	/*
	2	* (C) Copyright 2011-2012
	3	* Pali Rohár <pali.rohar@gmail.com>
	4	*
	5	* (C) Copyright 2010
	6	* Alistair Buxton <a.j.buxton@gmail.com>
	7	*
	8	* Derived from Beagle Board code:
	9	* (C) Copyright 2006-2008
	10	* Texas Instruments.
	11	* Richard Woodruff <r-woodruff2@ti.com>
	12	* Syed Mohammed Khasim <x0khasim@ti.com>
	13	*
	14	* Configuration settings for the Nokia RX-51 aka N900.
	15	*
3765b3e7	16	* SPDX-License-Identifier: GPL-2.0+
ed407be5 PR	17	*/
	18
	19	#ifndef __CONFIG_H
	20	#define __CONFIG_H
	21
	22	/*
	23	* High Level Configuration Options
	24	*/
ed407be5 PR	25	#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
	26
	27	#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
	28
	29	/*
	30	* Nokia X-Loader loading secondary image to address 0x80400000
	31	* NOLO loading boot image to random place, so it doesn't really
	32	* matter what we set this to. We have to copy u-boot to this address
	33	*/
ed407be5	34
ed407be5	35	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	36	#include <asm/arch/omap.h>
ed407be5 PR	37	#include <asm/arch/mem.h>
	38	#include <linux/stringify.h>
	39
ed407be5 PR	40	/* Clock Defines */
	41	#define V_OSCK 26000000 /* Clock output from T2 */
	42	#define V_SCLK (V_OSCK >> 1)
	43
ed407be5 PR	44	#define CONFIG_MISC_INIT_R
	45	#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
	46
	47	#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
	48	#define CONFIG_INITRD_TAG /* enable passing initrd */
	49	#define CONFIG_REVISION_TAG /* enable passing revision tag*/
	50	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
	51
	52	/*
	53	* Size of malloc() pool
	54	*/
	55	#define CONFIG_ENV_SIZE (128 << 10)
	56	#define CONFIG_UBI_SIZE (512 << 10)
	57	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
	58	(128 << 10))
	59
	60	/*
	61	* Hardware drivers
	62	*/
	63
	64	/*
	65	* NS16550 Configuration
	66	*/
	67	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
	68
ed407be5 PR	69	#define CONFIG_SYS_NS16550_SERIAL
	70	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	71	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	72
	73	/*
	74	* select serial console configuration
	75	*/
	76	#define CONFIG_CONS_INDEX 3
	77	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
	78	#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
	79
	80	/* allow to overwrite serial and ethaddr */
	81	#define CONFIG_ENV_OVERWRITE
ed407be5	82	#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
ed407be5	83
ed407be5 PR	84	/* USB device configuration */
	85	#define CONFIG_USB_DEVICE
	86	#define CONFIG_USBD_VENDORID 0x0421
	87	#define CONFIG_USBD_PRODUCTID 0x01c8
	88	#define CONFIG_USBD_MANUFACTURER "Nokia"
	89	#define CONFIG_USBD_PRODUCT_NAME "N900"
	90
ed407be5	91	/* commands to include */
ed407be5 PR	92
	93	#define CONFIG_CMDLINE_EDITING /* add command line history */
	94	#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
	95
6789e84e	96	#define CONFIG_SYS_I2C
ed407be5 PR	97
	98	/*
	99	* TWL4030
	100	*/
ed407be5 PR	101	#define CONFIG_TWL4030_LED
	102	#define CONFIG_TWL4030_KEYPAD
	103
ed407be5 PR	104	#define GPIO_SLIDE 71
	105
	106	/*
	107	* Board ONENAND Info.
	108	*/
	109
	110	#define PART1_NAME "bootloader"
	111	#define PART1_SIZE 128
	112	#define PART1_MULL 1024
	113	#define PART1_SUFF "k"
	114	#define PART1_OFFS 0x00000000
	115	#define PART1_MASK 0x00000003
	116
	117	#define PART2_NAME "config"
	118	#define PART2_SIZE 384
	119	#define PART2_MULL 1024
	120	#define PART2_SUFF "k"
	121	#define PART2_OFFS 0x00020000
	122	#define PART2_MASK 0x00000000
	123
	124	#define PART3_NAME "log"
	125	#define PART3_SIZE 256
	126	#define PART3_MULL 1024
	127	#define PART3_SUFF "k"
	128	#define PART3_OFFS 0x00080000
	129	#define PART3_MASK 0x00000000
	130
	131	#define PART4_NAME "kernel"
	132	#define PART4_SIZE 2
	133	#define PART4_MULL 1024*1024
	134	#define PART4_SUFF "m"
	135	#define PART4_OFFS 0x000c0000
	136	#define PART4_MASK 0x00000000
	137
	138	#define PART5_NAME "initfs"
	139	#define PART5_SIZE 2
	140	#define PART5_MULL 1024*1024
	141	#define PART5_SUFF "m"
	142	#define PART5_OFFS 0x002c0000
	143	#define PART5_MASK 0x00000000
	144
	145	#define PART6_NAME "rootfs"
	146	#define PART6_SIZE 257280
	147	#define PART6_MULL 1024
	148	#define PART6_SUFF "k"
	149	#define PART6_OFFS 0x004c0000
	150	#define PART6_MASK 0x00000000
	151
	152	#ifdef ONENAND_SUPPORT
	153
ed407be5 PR	154	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	155	#define CONFIG_MTD_DEVICE
	156	#define CONFIG_MTD_PARTITIONS
	157
ed407be5 PR	158	#endif
	159
	160	/* Watchdog support */
	161	#define CONFIG_HW_WATCHDOG
	162
	163	/*
	164	* Framebuffer
	165	*/
	166	/* Video console */
ed407be5 PR	167	#define CONFIG_VIDEO_LOGO
	168	#define VIDEO_FB_16BPP_PIXEL_SWAP
	169	#define VIDEO_FB_16BPP_WORD_SWAP
ed407be5 PR	170	#define CONFIG_SPLASH_SCREEN
	171
	172	/* functions for cfb_console */
	173	#define VIDEO_KBD_INIT_FCT rx51_kp_init()
	174	#define VIDEO_TSTC_FCT rx51_kp_tstc
	175	#define VIDEO_GETC_FCT rx51_kp_getc
	176	#ifndef __ASSEMBLY__
709ea543	177	struct stdio_dev;
ed407be5	178	int rx51_kp_init(void);
709ea543 SG	179	int rx51_kp_tstc(struct stdio_dev *sdev);
709ea543 SG	180	int rx51_kp_getc(struct stdio_dev *sdev);
ed407be5 PR	181	#endif
ed407be5 PR	182
ed407be5	183	/* Environment information */
43ede0bc TR	184	#ifdef CONFIG_MTDPARTS_DEFAULT
	185	#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
	186	#else
	187	#define MTDPARTS
	188	#endif
ed407be5	189	#define CONFIG_EXTRA_ENV_SETTINGS \
43ede0bc	190	MTDPARTS \
ed407be5 PR	191	"usbtty=cdc_acm\0" \
	192	"stdin=vga\0" \
	193	"stdout=vga\0" \
	194	"stderr=vga\0" \
	195	"setcon=setenv stdin ${con};" \
	196	"setenv stdout ${con};" \
	197	"setenv stderr ${con}\0" \
	198	"sercon=setenv con serial; run setcon\0" \
	199	"usbcon=setenv con usbtty; run setcon\0" \
	200	"vgacon=setenv con vga; run setcon\0" \
	201	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	202	"switchmmc=mmc dev ${mmcnum}\0" \
	203	"kernaddr=0x82008000\0" \
	204	"initrdaddr=0x84008000\0" \
	205	"scriptaddr=0x86008000\0" \
	206	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
	207	"${loadaddr} ${mmcfile}\0" \
	208	"kernload=setenv loadaddr ${kernaddr};" \
	209	"setenv mmcfile ${mmckernfile};" \
	210	"run fileload\0" \
	211	"initrdload=setenv loadaddr ${initrdaddr};" \
	212	"setenv mmcfile ${mmcinitrdfile};" \
	213	"run fileload\0" \
	214	"scriptload=setenv loadaddr ${scriptaddr};" \
	215	"setenv mmcfile ${mmcscriptfile};" \
	216	"run fileload\0" \
	217	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
	218	"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	219	"kernboot=echo Booting ${mmckernfile} from mmc " \
	220	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	221	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
	222	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	223	"attachboot=echo Booting attached kernel image ...;" \
	224	"setenv setup_omap_atag 1;" \
	225	"bootm ${attkernaddr};" \
	226	"setenv setup_omap_atag\0" \
	227	"trymmcscriptboot=if run switchmmc; then " \
	228	"if run scriptload; then " \
	229	"run scriptboot;" \
	230	"fi;" \
	231	"fi\0" \
	232	"trymmckernboot=if run switchmmc; then " \
	233	"if run kernload; then " \
	234	"run kernboot;" \
	235	"fi;" \
	236	"fi\0" \
	237	"trymmckerninitrdboot=if run switchmmc; then " \
	238	"if run initrdload; then " \
	239	"if run kernload; then " \
	240	"run kerninitrdboot;" \
	241	"fi;" \
	242	"fi; " \
	243	"fi\0" \
	244	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
	245	"setenv mmckernfile uImage; run trymmckernboot\0" \
	246	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
	247	"setenv mmcpart 2; run trymmcpartboot;" \
	248	"setenv mmcpart 3; run trymmcpartboot;" \
	249	"setenv mmcpart 4; run trymmcpartboot\0" \
	250	"trymmcboot=if run switchmmc; then " \
	251	"setenv mmctype fat;" \
	252	"run trymmcallpartboot;" \
	253	"setenv mmctype ext2;" \
	254	"run trymmcallpartboot;" \
255	"setenv mmctype ext4;" \
256	"run trymmcallpartboot;" \
257	"fi\0" \
258	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
259	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
d9993988 PR	260	"menucmd=bootmenu\0" \
	261	"bootmenu_0=Attached kernel=run attachboot\0" \
	262	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	263	"bootmenu_2=External SD card=run sdboot\0" \
	264	"bootmenu_3=U-Boot boot order=boot\0" \
	265	"bootmenu_delay=30\0" \
ed407be5 PR	266	""
	267
	268	#define CONFIG_PREBOOT \
d9993988 PR	269	"setenv mmcnum 1; setenv mmcpart 1;" \
	270	"setenv mmcscriptfile bootmenu.scr;" \
	271	"if run switchmmc; then " \
	272	"setenv mmcdone true;" \
	273	"setenv mmctype fat;" \
	274	"if run scriptload; then true; else " \
	275	"setenv mmctype ext2;" \
	276	"if run scriptload; then true; else " \
	277	"setenv mmctype ext4;" \
	278	"if run scriptload; then true; else " \
	279	"setenv mmcdone false;" \
	280	"fi;" \
	281	"fi;" \
	282	"fi;" \
	283	"if ${mmcdone}; then " \
	284	"run scriptboot;" \
	285	"fi;" \
	286	"fi;" \
	287	"if run slide; then true; else " \
	288	"setenv bootmenu_delay 0;" \
	289	"setenv bootdelay 0;" \
	290	"fi"
	291
	292	#define CONFIG_POSTBOOTMENU \
	293	"echo;" \
ed407be5 PR	294	"echo Extra commands:;" \
	295	"echo run sercon - Use serial port for control.;" \
	296	"echo run usbcon - Use usbtty for control.;" \
	297	"echo run vgacon - Use framebuffer/keyboard.;" \
	298	"echo run sdboot - Boot from SD card slot.;" \
	299	"echo run emmcboot - Boot internal eMMC memory.;" \
	300	"echo run attachboot - Boot attached kernel image.;" \
	301	"echo"
	302
	303	#define CONFIG_BOOTCOMMAND \
	304	"run sdboot;" \
	305	"run emmcboot;" \
	306	"run attachboot;" \
	307	"echo"
	308
d9993988 PR	309	#define CONFIG_MENU_SHOW
d9993988 PR	310
ed407be5 PR	311	/*
	312	* Miscellaneous configurable options
	313	*/
	314	#define CONFIG_SYS_LONGHELP /* undef to save memory */
ed407be5 PR	315
	316	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	317	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/31MB/
	318
	319	/* default load address */
	320	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
	321
	322	/*
	323	* OMAP3 has 12 GP timers, they can be driven by the system clock
	324	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	325	* This rate is divided by a local divisor.
	326	*/
	327	#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
	328	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
ed407be5	329
ed407be5 PR	330	/*
	331	* Physical Memory Map
	332	*/
	333	#define CONFIG_NR_DRAM_BANKS 2
	334	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	335
	336	/*
	337	* FLASH and environment organization
	338	*/
	339
ed407be5 PR	340	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	341	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	342	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	343	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	344	CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	345
	346	/*
	347	* Attached kernel image
	348	*/
	349
	350	#define SDRAM_SIZE 0x10000000 /* 256 MB */
	351	#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
	352
	353	#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
	354	#define KERNEL_OFFSET 0x40000 /* 256 kB */
	355	#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
	356	#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
	357
	358	/* Reserve protected RAM for attached kernel */
	359	#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
	360
	361	#endif /* __CONFIG_H */