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ed407be5 PR |
1 | /* |
2 | * (C) Copyright 2011-2012 | |
3 | * Pali Rohár <pali.rohar@gmail.com> | |
4 | * | |
5 | * (C) Copyright 2010 | |
6 | * Alistair Buxton <a.j.buxton@gmail.com> | |
7 | * | |
8 | * Derived from Beagle Board code: | |
9 | * (C) Copyright 2006-2008 | |
10 | * Texas Instruments. | |
11 | * Richard Woodruff <r-woodruff2@ti.com> | |
12 | * Syed Mohammed Khasim <x0khasim@ti.com> | |
13 | * | |
14 | * Configuration settings for the Nokia RX-51 aka N900. | |
15 | * | |
3765b3e7 | 16 | * SPDX-License-Identifier: GPL-2.0+ |
ed407be5 PR |
17 | */ |
18 | ||
19 | #ifndef __CONFIG_H | |
20 | #define __CONFIG_H | |
21 | ||
22 | /* | |
23 | * High Level Configuration Options | |
24 | */ | |
ed407be5 PR |
25 | #define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */ |
26 | ||
27 | #define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51 | |
28 | ||
29 | /* | |
30 | * Nokia X-Loader loading secondary image to address 0x80400000 | |
31 | * NOLO loading boot image to random place, so it doesn't really | |
32 | * matter what we set this to. We have to copy u-boot to this address | |
33 | */ | |
ed407be5 | 34 | |
ed407be5 | 35 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
987ec585 | 36 | #include <asm/arch/omap.h> |
ed407be5 PR |
37 | #include <asm/arch/mem.h> |
38 | #include <linux/stringify.h> | |
39 | ||
ed407be5 PR |
40 | /* Clock Defines */ |
41 | #define V_OSCK 26000000 /* Clock output from T2 */ | |
42 | #define V_SCLK (V_OSCK >> 1) | |
43 | ||
ed407be5 PR |
44 | #define CONFIG_MISC_INIT_R |
45 | #define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */ | |
46 | ||
47 | #define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */ | |
48 | #define CONFIG_INITRD_TAG /* enable passing initrd */ | |
49 | #define CONFIG_REVISION_TAG /* enable passing revision tag*/ | |
50 | #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ | |
51 | ||
52 | /* | |
53 | * Size of malloc() pool | |
54 | */ | |
55 | #define CONFIG_ENV_SIZE (128 << 10) | |
56 | #define CONFIG_UBI_SIZE (512 << 10) | |
57 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \ | |
58 | (128 << 10)) | |
59 | ||
60 | /* | |
61 | * Hardware drivers | |
62 | */ | |
63 | ||
64 | /* | |
65 | * NS16550 Configuration | |
66 | */ | |
67 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ | |
68 | ||
ed407be5 PR |
69 | #define CONFIG_SYS_NS16550_SERIAL |
70 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
71 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
72 | ||
73 | /* | |
74 | * select serial console configuration | |
75 | */ | |
76 | #define CONFIG_CONS_INDEX 3 | |
77 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 | |
78 | #define CONFIG_SERIAL3 3 /* UART3 on RX-51 */ | |
79 | ||
80 | /* allow to overwrite serial and ethaddr */ | |
81 | #define CONFIG_ENV_OVERWRITE | |
ed407be5 | 82 | #define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } |
ed407be5 | 83 | |
ed407be5 PR |
84 | /* USB device configuration */ |
85 | #define CONFIG_USB_DEVICE | |
86 | #define CONFIG_USBD_VENDORID 0x0421 | |
87 | #define CONFIG_USBD_PRODUCTID 0x01c8 | |
88 | #define CONFIG_USBD_MANUFACTURER "Nokia" | |
89 | #define CONFIG_USBD_PRODUCT_NAME "N900" | |
90 | ||
ed407be5 | 91 | /* commands to include */ |
ed407be5 | 92 | |
6789e84e | 93 | #define CONFIG_SYS_I2C |
ed407be5 PR |
94 | |
95 | /* | |
96 | * TWL4030 | |
97 | */ | |
ed407be5 PR |
98 | #define CONFIG_TWL4030_LED |
99 | #define CONFIG_TWL4030_KEYPAD | |
100 | ||
ed407be5 PR |
101 | #define GPIO_SLIDE 71 |
102 | ||
103 | /* | |
104 | * Board ONENAND Info. | |
105 | */ | |
106 | ||
107 | #define PART1_NAME "bootloader" | |
108 | #define PART1_SIZE 128 | |
109 | #define PART1_MULL 1024 | |
110 | #define PART1_SUFF "k" | |
111 | #define PART1_OFFS 0x00000000 | |
112 | #define PART1_MASK 0x00000003 | |
113 | ||
114 | #define PART2_NAME "config" | |
115 | #define PART2_SIZE 384 | |
116 | #define PART2_MULL 1024 | |
117 | #define PART2_SUFF "k" | |
118 | #define PART2_OFFS 0x00020000 | |
119 | #define PART2_MASK 0x00000000 | |
120 | ||
121 | #define PART3_NAME "log" | |
122 | #define PART3_SIZE 256 | |
123 | #define PART3_MULL 1024 | |
124 | #define PART3_SUFF "k" | |
125 | #define PART3_OFFS 0x00080000 | |
126 | #define PART3_MASK 0x00000000 | |
127 | ||
128 | #define PART4_NAME "kernel" | |
129 | #define PART4_SIZE 2 | |
130 | #define PART4_MULL 1024*1024 | |
131 | #define PART4_SUFF "m" | |
132 | #define PART4_OFFS 0x000c0000 | |
133 | #define PART4_MASK 0x00000000 | |
134 | ||
135 | #define PART5_NAME "initfs" | |
136 | #define PART5_SIZE 2 | |
137 | #define PART5_MULL 1024*1024 | |
138 | #define PART5_SUFF "m" | |
139 | #define PART5_OFFS 0x002c0000 | |
140 | #define PART5_MASK 0x00000000 | |
141 | ||
142 | #define PART6_NAME "rootfs" | |
143 | #define PART6_SIZE 257280 | |
144 | #define PART6_MULL 1024 | |
145 | #define PART6_SUFF "k" | |
146 | #define PART6_OFFS 0x004c0000 | |
147 | #define PART6_MASK 0x00000000 | |
148 | ||
149 | #ifdef ONENAND_SUPPORT | |
150 | ||
ed407be5 PR |
151 | #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP |
152 | #define CONFIG_MTD_DEVICE | |
153 | #define CONFIG_MTD_PARTITIONS | |
154 | ||
ed407be5 PR |
155 | #endif |
156 | ||
157 | /* Watchdog support */ | |
158 | #define CONFIG_HW_WATCHDOG | |
159 | ||
160 | /* | |
161 | * Framebuffer | |
162 | */ | |
163 | /* Video console */ | |
ed407be5 PR |
164 | #define CONFIG_VIDEO_LOGO |
165 | #define VIDEO_FB_16BPP_PIXEL_SWAP | |
166 | #define VIDEO_FB_16BPP_WORD_SWAP | |
ed407be5 PR |
167 | #define CONFIG_SPLASH_SCREEN |
168 | ||
169 | /* functions for cfb_console */ | |
170 | #define VIDEO_KBD_INIT_FCT rx51_kp_init() | |
171 | #define VIDEO_TSTC_FCT rx51_kp_tstc | |
172 | #define VIDEO_GETC_FCT rx51_kp_getc | |
173 | #ifndef __ASSEMBLY__ | |
709ea543 | 174 | struct stdio_dev; |
ed407be5 | 175 | int rx51_kp_init(void); |
709ea543 SG |
176 | int rx51_kp_tstc(struct stdio_dev *sdev); |
177 | int rx51_kp_getc(struct stdio_dev *sdev); | |
ed407be5 PR |
178 | #endif |
179 | ||
ed407be5 | 180 | /* Environment information */ |
43ede0bc TR |
181 | #ifdef CONFIG_MTDPARTS_DEFAULT |
182 | #define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" | |
183 | #else | |
184 | #define MTDPARTS | |
185 | #endif | |
ed407be5 | 186 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
43ede0bc | 187 | MTDPARTS \ |
ed407be5 PR |
188 | "usbtty=cdc_acm\0" \ |
189 | "stdin=vga\0" \ | |
190 | "stdout=vga\0" \ | |
191 | "stderr=vga\0" \ | |
192 | "setcon=setenv stdin ${con};" \ | |
193 | "setenv stdout ${con};" \ | |
194 | "setenv stderr ${con}\0" \ | |
195 | "sercon=setenv con serial; run setcon\0" \ | |
196 | "usbcon=setenv con usbtty; run setcon\0" \ | |
197 | "vgacon=setenv con vga; run setcon\0" \ | |
198 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ | |
199 | "switchmmc=mmc dev ${mmcnum}\0" \ | |
200 | "kernaddr=0x82008000\0" \ | |
201 | "initrdaddr=0x84008000\0" \ | |
202 | "scriptaddr=0x86008000\0" \ | |
203 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ | |
204 | "${loadaddr} ${mmcfile}\0" \ | |
205 | "kernload=setenv loadaddr ${kernaddr};" \ | |
206 | "setenv mmcfile ${mmckernfile};" \ | |
207 | "run fileload\0" \ | |
208 | "initrdload=setenv loadaddr ${initrdaddr};" \ | |
209 | "setenv mmcfile ${mmcinitrdfile};" \ | |
210 | "run fileload\0" \ | |
211 | "scriptload=setenv loadaddr ${scriptaddr};" \ | |
212 | "setenv mmcfile ${mmcscriptfile};" \ | |
213 | "run fileload\0" \ | |
214 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ | |
215 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ | |
216 | "kernboot=echo Booting ${mmckernfile} from mmc " \ | |
217 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \ | |
218 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ | |
219 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \ | |
220 | "attachboot=echo Booting attached kernel image ...;" \ | |
221 | "setenv setup_omap_atag 1;" \ | |
222 | "bootm ${attkernaddr};" \ | |
223 | "setenv setup_omap_atag\0" \ | |
224 | "trymmcscriptboot=if run switchmmc; then " \ | |
225 | "if run scriptload; then " \ | |
226 | "run scriptboot;" \ | |
227 | "fi;" \ | |
228 | "fi\0" \ | |
229 | "trymmckernboot=if run switchmmc; then " \ | |
230 | "if run kernload; then " \ | |
231 | "run kernboot;" \ | |
232 | "fi;" \ | |
233 | "fi\0" \ | |
234 | "trymmckerninitrdboot=if run switchmmc; then " \ | |
235 | "if run initrdload; then " \ | |
236 | "if run kernload; then " \ | |
237 | "run kerninitrdboot;" \ | |
238 | "fi;" \ | |
239 | "fi; " \ | |
240 | "fi\0" \ | |
241 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ | |
242 | "setenv mmckernfile uImage; run trymmckernboot\0" \ | |
243 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ | |
244 | "setenv mmcpart 2; run trymmcpartboot;" \ | |
245 | "setenv mmcpart 3; run trymmcpartboot;" \ | |
246 | "setenv mmcpart 4; run trymmcpartboot\0" \ | |
247 | "trymmcboot=if run switchmmc; then " \ | |
248 | "setenv mmctype fat;" \ | |
249 | "run trymmcallpartboot;" \ | |
250 | "setenv mmctype ext2;" \ | |
251 | "run trymmcallpartboot;" \ | |
252 | "setenv mmctype ext4;" \ | |
253 | "run trymmcallpartboot;" \ | |
254 | "fi\0" \ | |
255 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ | |
256 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ | |
d9993988 PR |
257 | "menucmd=bootmenu\0" \ |
258 | "bootmenu_0=Attached kernel=run attachboot\0" \ | |
259 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ | |
260 | "bootmenu_2=External SD card=run sdboot\0" \ | |
261 | "bootmenu_3=U-Boot boot order=boot\0" \ | |
262 | "bootmenu_delay=30\0" \ | |
ed407be5 PR |
263 | "" |
264 | ||
265 | #define CONFIG_PREBOOT \ | |
d9993988 PR |
266 | "setenv mmcnum 1; setenv mmcpart 1;" \ |
267 | "setenv mmcscriptfile bootmenu.scr;" \ | |
268 | "if run switchmmc; then " \ | |
269 | "setenv mmcdone true;" \ | |
270 | "setenv mmctype fat;" \ | |
271 | "if run scriptload; then true; else " \ | |
272 | "setenv mmctype ext2;" \ | |
273 | "if run scriptload; then true; else " \ | |
274 | "setenv mmctype ext4;" \ | |
275 | "if run scriptload; then true; else " \ | |
276 | "setenv mmcdone false;" \ | |
277 | "fi;" \ | |
278 | "fi;" \ | |
279 | "fi;" \ | |
280 | "if ${mmcdone}; then " \ | |
281 | "run scriptboot;" \ | |
282 | "fi;" \ | |
283 | "fi;" \ | |
284 | "if run slide; then true; else " \ | |
285 | "setenv bootmenu_delay 0;" \ | |
286 | "setenv bootdelay 0;" \ | |
287 | "fi" | |
288 | ||
289 | #define CONFIG_POSTBOOTMENU \ | |
290 | "echo;" \ | |
ed407be5 PR |
291 | "echo Extra commands:;" \ |
292 | "echo run sercon - Use serial port for control.;" \ | |
293 | "echo run usbcon - Use usbtty for control.;" \ | |
294 | "echo run vgacon - Use framebuffer/keyboard.;" \ | |
295 | "echo run sdboot - Boot from SD card slot.;" \ | |
296 | "echo run emmcboot - Boot internal eMMC memory.;" \ | |
297 | "echo run attachboot - Boot attached kernel image.;" \ | |
298 | "echo" | |
299 | ||
300 | #define CONFIG_BOOTCOMMAND \ | |
301 | "run sdboot;" \ | |
302 | "run emmcboot;" \ | |
303 | "run attachboot;" \ | |
304 | "echo" | |
305 | ||
d9993988 PR |
306 | #define CONFIG_MENU_SHOW |
307 | ||
ed407be5 PR |
308 | /* |
309 | * Miscellaneous configurable options | |
310 | */ | |
ed407be5 PR |
311 | |
312 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) | |
313 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/ | |
314 | ||
315 | /* default load address */ | |
316 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) | |
317 | ||
318 | /* | |
319 | * OMAP3 has 12 GP timers, they can be driven by the system clock | |
320 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). | |
321 | * This rate is divided by a local divisor. | |
322 | */ | |
323 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) | |
324 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
ed407be5 | 325 | |
ed407be5 PR |
326 | /* |
327 | * Physical Memory Map | |
328 | */ | |
329 | #define CONFIG_NR_DRAM_BANKS 2 | |
330 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 | |
331 | ||
332 | /* | |
333 | * FLASH and environment organization | |
334 | */ | |
335 | ||
ed407be5 PR |
336 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
337 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 | |
338 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 | |
339 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ | |
340 | CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
341 | ||
342 | /* | |
343 | * Attached kernel image | |
344 | */ | |
345 | ||
346 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ | |
347 | #define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE) | |
348 | ||
349 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ | |
350 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ | |
351 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) | |
352 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) | |
353 | ||
354 | /* Reserve protected RAM for attached kernel */ | |
355 | #define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1) | |
356 | ||
357 | #endif /* __CONFIG_H */ |