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1/*
2 * Copyright (C) 2017 Andes Technology Corporation
3 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * CPU and Board Configuration Options
13 */
14#define CONFIG_SKIP_LOWLEVEL_INIT
15
16#define CONFIG_CMDLINE_EDITING
17#define CONFIG_BOOTP_SEND_HOSTNAME
18#define CONFIG_BOOTP_SERVERIP
19
20#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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21#ifdef CONFIG_OF_CONTROL
22#undef CONFIG_OF_SEPARATE
23#define CONFIG_OF_EMBED
24#endif
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25#endif
26
27/*
28 * Miscellaneous configurable options
29 */
30#define CONFIG_SYS_LONGHELP /* undef to save memory */
31#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
32
33/*
34 * Print Buffer Size
35 */
36#define CONFIG_SYS_PBSIZE \
37 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
38
39/*
40 * max number of command args
41 */
42#define CONFIG_SYS_MAXARGS 16
43
44/*
45 * Boot Argument Buffer Size
46 */
47#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
48
49/*
50 * Size of malloc() pool
51 * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
52 */
53#define CONFIG_SYS_MALLOC_LEN (512 << 10)
54
55/*
56 * Physical Memory Map
57 */
58#define CONFIG_NR_DRAM_BANKS 2
59#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
60#define PHYS_SDRAM_1 \
61 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
62#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
63#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
64#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
65
66/*
67 * Serial console configuration
68 */
69#define CONFIG_CONS_INDEX 1
70#define CONFIG_SYS_NS16550_SERIAL
71#ifndef CONFIG_DM_SERIAL
72#define CONFIG_SYS_NS16550_REG_SIZE -4
73#endif
74#define CONFIG_SYS_NS16550_CLK 19660800
75
76/*
77 * SD (MMC) controller
78 */
79#define CONFIG_FTSDC010_NUMBER 1
80#define CONFIG_FTSDC010_SDIO
81
82/* Init Stack Pointer */
83#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
84 GENERATED_GBL_DATA_SIZE)
85
86/*
87 * Load address and memory test area should agree with
88 * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
89 */
90#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */
91
92/*
93 * memtest works on 512 MB in DRAM
94 */
95#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0
96#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
97
98/* environments */
99#define CONFIG_ENV_SPI_BUS 0
100#define CONFIG_ENV_SPI_CS 0
101#define CONFIG_ENV_SPI_MAX_HZ 50000000
102#define CONFIG_ENV_SPI_MODE 0
103#define CONFIG_ENV_SECT_SIZE 0x1000
104#define CONFIG_ENV_OVERWRITE
105
106/* SPI FLASH */
107#define CONFIG_SF_DEFAULT_BUS 0
108#define CONFIG_SF_DEFAULT_CS 0
109#define CONFIG_SF_DEFAULT_SPEED 1000000
110#define CONFIG_SF_DEFAULT_MODE 0
111
112/*
113 * For booting Linux, the board info and command line data
114 * have to be in the first 16 MB of memory, since this is
115 * the maximum mapped by the Linux kernel during initialization.
116 */
117
118/* Initial Memory map for Linux*/
119#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
120/* Increase max gunzip size */
121#define CONFIG_SYS_BOOTM_LEN (64 << 20)
122
123#endif /* __CONFIG_H */