[people/ms/u-boot.git] / include / configs / omap1510inn.h

/*
 * (C) Copyright 2003
 * Texas Instruments.
 * Kshitij Gupta <kshitij@ti.com>
 * Configuation settings for the TI OMAP Innovator board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM925T	1		/* This is an arm925t CPU	*/
#define CONFIG_OMAP	1		/* in a TI OMAP core	*/
#define CONFIG_OMAP1510 1		/* which is in a 1510 (helen) */
#define CONFIG_INNOVATOROMAP1510 1	/*	a Innovator Board  */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000	/* the OMAP1510 Innovator has 12MHz input clock */

#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CFG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */
/*
#define CONFIG_DRIVER_SMC9196
#define CONFIG_SMC9196_BASE 0x08000300
#define CONFIG_SMC9196_EXT_PHY
*/
#define CONFIG_DRIVER_LAN91C96
#define CONFIG_LAN91C96_BASE 0x08000300
#define CONFIG_LAN91C96_EXT_PHY

/*
 * NS16550 Configuration
 */
#define CFG_NS16550
#define CFG_NS16550_SERIAL
#define CFG_NS16550_REG_SIZE	(-4)
#define CFG_NS16550_CLK		(CONFIG_SYS_CLK_FREQ)	/* can be 12M/32Khz or 48Mhz  */
#define CFG_NS16550_COM1	0xfffb0000		/* uart1, bluetooth uart on helen */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use SERIAL 1 on OMAP1510 Innovator */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX	1
#define CONFIG_BAUDRATE		115200
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | CFG_CMD_DHCP)
#define CONFIG_BOOTP_MASK	CONFIG_BOOTP_DEFAULT

/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
#include <configs/omap1510.h>

#define CONFIG_BOOTDELAY	3
#define CONFIG_BOOTARGS		"console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
#define CONFIG_BOOTCOMMAND	"bootp;tftp;bootm"
#define CFG_AUTOLOAD		"n"		/* No autoload */

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP				/* undef to save memory		*/
#define CFG_PROMPT		"OMAP1510 Innovator # " /* Monitor Command Prompt	*/
#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x10000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x12000000	/* 32 MB in DRAM	*/

#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define CFG_LOAD_ADDR		0x10000000	/* default load address */

/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
 * This time is further subdivided by a local divisor.
 */
#define CFG_TIMERBASE	0xFFFEC500	    /* use timer 1 */
#define CFG_PVT		7		    /* 2^(pvt+1), divide by 256 */
#define CFG_HZ			((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x10000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */

#define CFG_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */
#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks */
#define PHYS_FLASH_SIZE		0x01000000 /* 16MB */
#define PHYS_FLASH_SECT_SIZE	(128*1024)	/* Size of a sector (128kB) */
#define CFG_MAX_FLASH_SECT	(128)	/* max number of sectors on one chip */
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
#define CFG_MONITOR_BASE	CFG_FLASH_BASE	/* Monitor at beginning of flash */
#define CFG_MONITOR_LEN		PHYS_FLASH_SECT_SIZE	/* Reserve 1 sector */
#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }

/*-----------------------------------------------------------------------
 * FLASH driver setup
 */
#define CFG_FLASH_CFI		1	/* Flash memory is CFI compliant */
#define CFG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
#define CFG_FLASH_USE_BUFFER_WRITE	1	/* Use buffered writes (~10x faster) */
#define CFG_FLASH_PROTECTION	1	/* Use hardware sector protection */

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(20*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(20*CFG_HZ) /* Timeout for Flash Write */

#define CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_SECT_SIZE	PHYS_FLASH_SECT_SIZE	/* Total Size of Environment Sector */
#define CFG_ENV_SIZE		CFG_ENV_SECT_SIZE
#define CFG_ENV_OFFSET		( CFG_MONITOR_BASE + CFG_MONITOR_LEN )	/* Environment after Monitor */

#endif	/* __CONFIG_H */
Commit	Line	Data
2e5983d2 WD	1	/*
	2	* (C) Copyright 2003
	3	* Texas Instruments.
	4	* Kshitij Gupta <kshitij@ti.com>
	5	* Configuation settings for the TI OMAP Innovator board.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* High Level Configuration Options
	31	* (easy to change)
	32	*/
	33	#define CONFIG_ARM925T 1 /* This is an arm925t CPU */
	34	#define CONFIG_OMAP 1 /* in a TI OMAP core */
	35	#define CONFIG_OMAP1510 1 /* which is in a 1510 (helen) */
	36	#define CONFIG_INNOVATOROMAP1510 1 /* a Innovator Board */
	37
	38	/* input clock of PLL */
	39	#define CONFIG_SYS_CLK_FREQ 12000000 /* the OMAP1510 Innovator has 12MHz input clock */
	40
	41	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	42
	43	#define CONFIG_MISC_INIT_R
	44
	45	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	46	#define CONFIG_SETUP_MEMORY_TAGS 1
5779d8d9	47	#define CONFIG_INITRD_TAG 1
2e5983d2 WD	48
	49	/*
	50	* Size of malloc() pool
	51	*/
	52	#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
a8c7c708	53	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
2e5983d2 WD	54
	55	/*
	56	* Hardware drivers
	57	*/
	58	/*
	59	#define CONFIG_DRIVER_SMC9196
	60	#define CONFIG_SMC9196_BASE 0x08000300
	61	#define CONFIG_SMC9196_EXT_PHY
	62	*/
	63	#define CONFIG_DRIVER_LAN91C96
	64	#define CONFIG_LAN91C96_BASE 0x08000300
	65	#define CONFIG_LAN91C96_EXT_PHY
	66
	67	/*
	68	* NS16550 Configuration
	69	*/
	70	#define CFG_NS16550
	71	#define CFG_NS16550_SERIAL
	72	#define CFG_NS16550_REG_SIZE (-4)
	73	#define CFG_NS16550_CLK (CONFIG_SYS_CLK_FREQ) /* can be 12M/32Khz or 48Mhz */
	74	#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart on helen */
	75
	76	/*
	77	* select serial console configuration
	78	*/
	79	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1510 Innovator */
	80
	81	/* allow to overwrite serial and ethaddr */
	82	#define CONFIG_ENV_OVERWRITE
	83
	84	#define CONFIG_ENV_OVERWRITE
	85	#define CONFIG_CONS_INDEX 1
	86	#define CONFIG_BAUDRATE 115200
	87	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	88
	89	#define CONFIG_COMMANDS (CONFIG_CMD_DFL \| CFG_CMD_DHCP)
	90	#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
	91
	92	/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
	93	#include <cmd_confdefs.h>
	94	#include <configs/omap1510.h>
	95
	96	#define CONFIG_BOOTDELAY 3
5779d8d9 WD	97	#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=bootp"
	98	#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
	99	#define CFG_AUTOLOAD "n" /* No autoload */
2e5983d2 WD	100
	101	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
	102	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
	103	/* what's this ? it's not used anywhere */
	104	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
	105	#endif
	106
	107	/*
	108	* Miscellaneous configurable options
	109	*/
	110	#define CFG_LONGHELP /* undef to save memory */
	111	#define CFG_PROMPT "OMAP1510 Innovator # " /* Monitor Command Prompt */
	112	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	113	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	114	#define CFG_MAXARGS 16 /* max number of command args */
	115	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	116
	117	#define CFG_MEMTEST_START 0x10000000 /* memtest works on */
	118	#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */
	119
	120	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
	121
	122	#define CFG_LOAD_ADDR 0x10000000 /* default load address */
	123
	124	/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1.
	125	* This time is further subdivided by a local divisor.
	126	*/
	127	#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */
	128	#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */
	129	#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT))
	130
	131	/*-----------------------------------------------------------------------
	132	* Stack sizes
	133	*
	134	* The stack sizes are set up in start.S using the settings below
	135	*/
	136	#define CONFIG_STACKSIZE (1281024) / regular stack */
	137	#ifdef CONFIG_USE_IRQ
	138	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	139	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	140	#endif
	141
	142	/*-----------------------------------------------------------------------
	143	* Physical Memory Map
	144	*/
	145	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
	146	#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */
	147	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
	148
	149	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
	150
	151	#define CFG_FLASH_BASE PHYS_FLASH_1
	152
	153	/*-----------------------------------------------------------------------
	154	* FLASH and environment organization
	155	*/
656658dd	156	#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
2e5983d2	157	#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */
656658dd	158	#define PHYS_FLASH_SECT_SIZE (1281024) / Size of a sector (128kB) */
2e5983d2	159	#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
656658dd WD	160	#define CFG_ENV_ADDR (CFG_FLASH_BASE + PHYS_FLASH_SECT_SIZE)
	161	#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
	162	#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE /* Reserve 1 sector */
	163	#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, CFG_FLASH_BASE + PHYS_FLASH_SIZE }
	164
	165	/*-----------------------------------------------------------------------
	166	* FLASH driver setup
	167	*/
	168	#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
	169	#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
	170	#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
	171	#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
2e5983d2 WD	172
	173	/* timeout values are in ticks */
	174	#define CFG_FLASH_ERASE_TOUT (20CFG_HZ) / Timeout for Flash Erase */
	175	#define CFG_FLASH_WRITE_TOUT (20CFG_HZ) / Timeout for Flash Write */
	176
	177	#define CFG_ENV_IS_IN_FLASH 1
656658dd WD	178	#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE /* Total Size of Environment Sector */
	179	#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
	180	#define CFG_ENV_OFFSET ( CFG_MONITOR_BASE + CFG_MONITOR_LEN ) /* Environment after Monitor */
2e5983d2 WD	181
2e5983d2 WD	182	#endif /* __CONFIG_H */