[people/ms/u-boot.git] / include / configs / omap3_beagle.h

/*
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 *
 * Configuration settings for the TI OMAP3530 Beagle board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */

/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.  We use this rather than the inherited defines from
 * ti_armv7_common.h for backwards compatibility.
 */
#define CONFIG_SYS_TEXT_BASE		0x80100000
#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		(512 << 10)	/* 512 KB */
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000

#include <configs/ti_omap3_common.h>

#define CONFIG_MISC_INIT_R

#define CONFIG_REVISION_TAG		1
#define CONFIG_ENV_OVERWRITE

/* Status LED */

/* Enable Multi Bus support for I2C */
#define CONFIG_I2C_MULTI_BUS		1

/* Probe all devices */
#define CONFIG_SYS_I2C_NOPROBES		{{0x0, 0x0}}

/* USB */
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_TWL4030_USB		1
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETHER_RNDIS
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x07000000

/* USB EHCI */
#define CONFIG_USB_EHCI

#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	147

#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
#define CONFIG_USB_HOST_ETHER
#define CONFIG_USB_ETHER_ASIX
#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_USB_ETHER_SMSC95XX

/* GPIO banks */
#define CONFIG_OMAP3_GPIO_5		/* GPIO128..159 is in GPIO bank 5 */
#define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */

/* commands to include */

#define MTDIDS_DEFAULT			"nand0=nand"
#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
					"1920k(u-boot),128k(u-boot-env),"\
					"4m(kernel),-(fs)"

#define CONFIG_CMD_NAND		/* NAND support			*/

#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/

/*
 * TWL4030
 */
#define CONFIG_TWL4030_LED		1

/*
 * Board NAND Info.
 */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
							/* devices */

#define BOOT_TARGET_DEVICES(func) \
	func(MMC, mmc, 0)

#define CONFIG_BOOTCOMMAND \
	"run findfdt; " \
	"run distro_bootcmd; " \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run userbutton; then " \
			"setenv bootenv uEnv.txt;" \
		"else " \
			"setenv bootenv user.txt;" \
		"fi;" \
		"echo SD/MMC found on device ${mmcdev};" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loadimage; then " \
				"run mmcboot;" \
			"fi;" \
		"fi; " \
	"fi;" \
	"run nandboot;" \
	"setenv bootfile zImage;" \
	"if run loadimage; then " \
		"run loadfdt;" \
		"run mmcbootz; " \
	"fi; " \

#include <config_distro_bootcmd.h>

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x80200000\0" \
	"kernel_addr_r=0x80200000\0" \
	"rdaddr=0x81000000\0" \
	"initrd_addr_r=0x81000000\0" \
	"fdt_high=0xffffffff\0" \
	"fdtaddr=0x80f80000\0" \
	"fdt_addr_r=0x80f80000\0" \
	"usbtty=cdc_acm\0" \
	"bootfile=uImage\0" \
	"ramdisk=ramdisk.gz\0" \
	"bootdir=/boot\0" \
	"bootpart=0:2\0" \
	"console=ttyO2,115200n8\0" \
	"mpurate=auto\0" \
	"buddy=none\0" \
	"optargs=\0" \
	"camera=none\0" \
	"vram=12M\0" \
	"dvimode=640x480MR-16@60\0" \
	"defaultdisplay=dvi\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext3 rootwait\0" \
	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
	"nandrootfstype=ubifs\0" \
	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
	"ramrootfstype=ext2\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"camera=${camera} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"camera=${camera} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"findfdt=" \
		"if test $beaglerev = AxBx; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = Cx; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = C4; then " \
			"setenv fdtfile omap3-beagle.dtb; fi; " \
		"if test $beaglerev = xMAB; then " \
			"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
		"if test $beaglerev = xMC; then " \
			"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
		"if test $fdtfile = undefined; then " \
			"echo WARNING: Could not determine device tree to use; fi; \0" \
	"validatefdt=" \
		"if test $beaglerev = xMAB; then " \
			"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
				"setenv fdtfile omap3-beagle-xm.dtb; " \
			"fi; " \
		"fi; \0" \
	"bootenv=uEnv.txt\0" \
	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t -r $loadaddr $filesize\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"buddy=${buddy} "\
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
		"source ${loadaddr}\0" \
	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} 280000 400000; " \
		"bootm ${loadaddr}\0" \
	"ramboot=echo Booting from ramdisk ...; " \
		"run ramargs; " \
		"bootm ${loadaddr}\0" \
	"userbutton=if gpio input 173; then run userbutton_xm; " \
		"else run userbutton_nonxm; fi;\0" \
	"userbutton_xm=gpio input 4;\0" \
	"userbutton_nonxm=gpio input 7;\0" \
	BOOTENV

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

/* **** PISMO SUPPORT *** */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

#define CONFIG_OMAP3_SPI

/* Defines for SPL */
#define CONFIG_SPL_OMAP3_ID_NAND

/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
						10, 11, 12, 13}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	3
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif /* __CONFIG_H */
Commit	Line	Data
f904cdbb DB	1	/*
	2	* (C) Copyright 2006-2008
	3	* Texas Instruments.
	4	* Richard Woodruff <r-woodruff2@ti.com>
	5	* Syed Mohammed Khasim <x0khasim@ti.com>
	6	*
	7	* Configuration settings for the TI OMAP3530 Beagle board.
	8	*
3765b3e7	9	* SPDX-License-Identifier: GPL-2.0+
f904cdbb DB	10	*/
	11
	12	#ifndef __CONFIG_H
	13	#define __CONFIG_H
f904cdbb	14
df4dbb5d TR	15	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
df4dbb5d TR	16
f904cdbb	17	/*
df4dbb5d TR	18	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	19	* 64 bytes before this address should be set aside for u-boot.img's
	20	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	21	* other needs. We use this rather than the inherited defines from
	22	* ti_armv7_common.h for backwards compatibility.
f904cdbb	23	*/
df4dbb5d TR	24	#define CONFIG_SYS_TEXT_BASE 0x80100000
	25	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	26	#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
	27	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	28	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
cae377b5	29
df4dbb5d	30	#include <configs/ti_omap3_common.h>
f904cdbb	31
f904cdbb DB	32	#define CONFIG_MISC_INIT_R
f904cdbb DB	33
f904cdbb	34	#define CONFIG_REVISION_TAG 1
f904cdbb	35	#define CONFIG_ENV_OVERWRITE
f904cdbb	36
70d8c944	37	/* Status LED */
70d8c944	38
f74fc4ae JK	39	/* Enable Multi Bus support for I2C */
	40	#define CONFIG_I2C_MULTI_BUS 1
	41
	42	/* Probe all devices */
8c4e0ca6	43	#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
f74fc4ae	44
25374bfb	45	/* USB */
c2af345e	46	#define CONFIG_USB_MUSB_OMAP2PLUS
95de1e2f	47	#define CONFIG_USB_MUSB_PIO_ONLY
25374bfb	48	#define CONFIG_TWL4030_USB 1
c642b151 IY	49	#define CONFIG_USB_ETHER
c642b151 IY	50	#define CONFIG_USB_ETHER_RNDIS
17da3c0c	51	#define CONFIG_USB_FUNCTION_FASTBOOT
dd5b68fb RH	52	#define CONFIG_CMD_FASTBOOT
dd5b68fb RH	53	#define CONFIG_ANDROID_BOOT_IMAGE
a588d99a PK	54	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
a588d99a PK	55	#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
25374bfb	56
d90859a6	57	/* USB EHCI */
d90859a6	58	#define CONFIG_USB_EHCI
928c4bdf	59
29321c05	60	#define CONFIG_USB_EHCI_OMAP
29321c05 IY	61	#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
29321c05 IY	62
d90859a6	63	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
2162439a	64	#define CONFIG_USB_HOST_ETHER
54b62d59	65	#define CONFIG_USB_ETHER_ASIX
a743415f	66	#define CONFIG_USB_ETHER_MCS7830
eddf6d28	67	#define CONFIG_USB_ETHER_SMSC95XX
2162439a	68
ce23b18b SR	69	/* GPIO banks */
	70	#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
	71	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
d90859a6	72
f904cdbb	73	/* commands to include */
df4dbb5d	74
917cfc70 NM	75	#define MTDIDS_DEFAULT "nand0=nand"
	76	#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
	77	"1920k(u-boot),128k(u-boot-env),"\
	78	"4m(kernel),-(fs)"
f904cdbb	79
f904cdbb DB	80	#define CONFIG_CMD_NAND /* NAND support */
f904cdbb DB	81
25a4d017	82	#define CONFIG_VIDEO_OMAP3 /* DSS Support */
f904cdbb	83
2c155130 TR	84	/*
	85	* TWL4030
	86	*/
2c155130 TR	87	#define CONFIG_TWL4030_LED 1
2c155130 TR	88
f904cdbb DB	89	/*
	90	* Board NAND Info.
	91	*/
	92	#define CONFIG_NAND_OMAP_GPMC
f904cdbb DB	93	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
f904cdbb DB	94	/* devices */
f904cdbb	95
c721fd6e GG	96	#define BOOT_TARGET_DEVICES(func) \
	97	func(MMC, mmc, 0)
	98
	99	#define CONFIG_BOOTCOMMAND \
	100	"run findfdt; " \
	101	"run distro_bootcmd; " \
	102	"mmc dev ${mmcdev}; if mmc rescan; then " \
	103	"if run userbutton; then " \
	104	"setenv bootenv uEnv.txt;" \
	105	"else " \
	106	"setenv bootenv user.txt;" \
	107	"fi;" \
	108	"echo SD/MMC found on device ${mmcdev};" \
	109	"if run loadbootenv; then " \
	110	"echo Loaded environment from ${bootenv};" \
	111	"run importbootenv;" \
	112	"fi;" \
	113	"if test -n $uenvcmd; then " \
	114	"echo Running uenvcmd ...;" \
	115	"run uenvcmd;" \
	116	"fi;" \
	117	"if run loadbootscript; then " \
	118	"run bootscript; " \
	119	"else " \
	120	"if run loadimage; then " \
	121	"run mmcboot;" \
	122	"fi;" \
	123	"fi; " \
	124	"fi;" \
	125	"run nandboot;" \
	126	"setenv bootfile zImage;" \
	127	"if run loadimage; then " \
	128	"run loadfdt;" \
	129	"run mmcbootz; " \
	130	"fi; " \
	131
	132	#include <config_distro_bootcmd.h>
	133
f904cdbb	134	#define CONFIG_EXTRA_ENV_SETTINGS \
f4b36ea9	135	"loadaddr=0x80200000\0" \
c721fd6e	136	"kernel_addr_r=0x80200000\0" \
f4b36ea9	137	"rdaddr=0x81000000\0" \
c721fd6e	138	"initrd_addr_r=0x81000000\0" \
2ade496f NM	139	"fdt_high=0xffffffff\0" \
2ade496f NM	140	"fdtaddr=0x80f80000\0" \
c721fd6e	141	"fdt_addr_r=0x80f80000\0" \
25374bfb	142	"usbtty=cdc_acm\0" \
a33e3c79	143	"bootfile=uImage\0" \
102ce9ea NM	144	"ramdisk=ramdisk.gz\0" \
	145	"bootdir=/boot\0" \
	146	"bootpart=0:2\0" \
27b8c8f2	147	"console=ttyO2,115200n8\0" \
f6e593bb	148	"mpurate=auto\0" \
847b83d0	149	"buddy=none\0" \
c522eac4 JK	150	"optargs=\0" \
c522eac4 JK	151	"camera=none\0" \
13d2cb98	152	"vram=12M\0" \
f4b36ea9	153	"dvimode=640x480MR-16@60\0" \
13d2cb98	154	"defaultdisplay=dvi\0" \
0cd31144	155	"mmcdev=0\0" \
13d2cb98 SS	156	"mmcroot=/dev/mmcblk0p2 rw\0" \
13d2cb98 SS	157	"mmcrootfstype=ext3 rootwait\0" \
3c6e50d7 SS	158	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
3c6e50d7 SS	159	"nandrootfstype=ubifs\0" \
f4b36ea9 JK	160	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
f4b36ea9 JK	161	"ramrootfstype=ext2\0" \
f904cdbb	162	"mmcargs=setenv bootargs console=${console} " \
c522eac4	163	"${optargs} " \
5af32460	164	"mpurate=${mpurate} " \
b1660314	165	"buddy=${buddy} "\
c522eac4	166	"camera=${camera} "\
13d2cb98 SS	167	"vram=${vram} " \
13d2cb98 SS	168	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	169	"omapdss.def_disp=${defaultdisplay} " \
	170	"root=${mmcroot} " \
	171	"rootfstype=${mmcrootfstype}\0" \
f904cdbb	172	"nandargs=setenv bootargs console=${console} " \
c522eac4	173	"${optargs} " \
5af32460	174	"mpurate=${mpurate} " \
b1660314	175	"buddy=${buddy} "\
c522eac4	176	"camera=${camera} "\
13d2cb98 SS	177	"vram=${vram} " \
13d2cb98 SS	178	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	179	"omapdss.def_disp=${defaultdisplay} " \
	180	"root=${nandroot} " \
	181	"rootfstype=${nandrootfstype}\0" \
2ade496f NM	182	"findfdt=" \
	183	"if test $beaglerev = AxBx; then " \
	184	"setenv fdtfile omap3-beagle.dtb; fi; " \
	185	"if test $beaglerev = Cx; then " \
	186	"setenv fdtfile omap3-beagle.dtb; fi; " \
5c9038b6 RN	187	"if test $beaglerev = C4; then " \
5c9038b6 RN	188	"setenv fdtfile omap3-beagle.dtb; fi; " \
2ade496f	189	"if test $beaglerev = xMAB; then " \
3d47ffb9	190	"setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
2ade496f NM	191	"if test $beaglerev = xMC; then " \
	192	"setenv fdtfile omap3-beagle-xm.dtb; fi; " \
	193	"if test $fdtfile = undefined; then " \
	194	"echo WARNING: Could not determine device tree to use; fi; \0" \
4fa2427c RN	195	"validatefdt=" \
	196	"if test $beaglerev = xMAB; then " \
	197	"if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
	198	"setenv fdtfile omap3-beagle-xm.dtb; " \
	199	"fi; " \
	200	"fi; \0" \
f835ea71 JK	201	"bootenv=uEnv.txt\0" \
f835ea71 JK	202	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
cf073e49	203	"importbootenv=echo Importing environment from mmc ...; " \
44bd26fa	204	"env import -t -r $loadaddr $filesize\0" \
f4b36ea9 JK	205	"ramargs=setenv bootargs console=${console} " \
	206	"${optargs} " \
	207	"mpurate=${mpurate} " \
	208	"buddy=${buddy} "\
	209	"vram=${vram} " \
	210	"omapfb.mode=dvi:${dvimode} " \
	211	"omapdss.def_disp=${defaultdisplay} " \
	212	"root=${ramroot} " \
	213	"rootfstype=${ramrootfstype}\0" \
102ce9ea NM	214	"loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
102ce9ea NM	215	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
09642269 GG	216	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	217	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	218	"source ${loadaddr}\0" \
4fa2427c	219	"loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
f904cdbb DB	220	"mmcboot=echo Booting from mmc ...; " \
	221	"run mmcargs; " \
	222	"bootm ${loadaddr}\0" \
ea70690d NM	223	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
	224	"run mmcargs; " \
	225	"bootz ${loadaddr} - ${fdtaddr}\0" \
f904cdbb DB	226	"nandboot=echo Booting from nand ...; " \
	227	"run nandargs; " \
	228	"nand read ${loadaddr} 280000 400000; " \
	229	"bootm ${loadaddr}\0" \
f4b36ea9 JK	230	"ramboot=echo Booting from ramdisk ...; " \
	231	"run ramargs; " \
	232	"bootm ${loadaddr}\0" \
aae58b95 JF	233	"userbutton=if gpio input 173; then run userbutton_xm; " \
	234	"else run userbutton_nonxm; fi;\0" \
	235	"userbutton_xm=gpio input 4;\0" \
c721fd6e GG	236	"userbutton_nonxm=gpio input 7;\0" \
c721fd6e GG	237	BOOTENV
f904cdbb	238
f904cdbb	239	/*
d3a513c2 MP	240	* OMAP3 has 12 GP timers, they can be driven by the system clock
	241	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	242	* This rate is divided by a local divisor.
f904cdbb	243	*/
d3a513c2	244	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
f904cdbb	245
f904cdbb DB	246	/*-----------------------------------------------------------------------
	247	* FLASH and environment organization
	248	*/
	249
	250	/* ** PISMO SUPPORT * */
6cbec7b3	251	#if defined(CONFIG_CMD_NAND)
222a3113	252	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	253	#endif
f904cdbb DB	254
	255	/* Monitor at start of flash */
	256	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	257	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	258
	259	#define CONFIG_ENV_IS_IN_NAND 1
df4dbb5d	260	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
f904cdbb DB	261	#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
	262	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
	263
6cbec7b3 LC	264	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	265	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
f904cdbb DB	266	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
f904cdbb DB	267
53736baa DB	268	#define CONFIG_OMAP3_SPI
53736baa DB	269
75c57a35	270	/* Defines for SPL */
75c57a35	271	#define CONFIG_SPL_OMAP3_ID_NAND
75c57a35 TR	272
75c57a35 TR	273	/* NAND boot config */
55f1b39f	274	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
75c57a35 TR	275	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	276	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	277	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	278	#define CONFIG_SYS_NAND_OOBSIZE 64
	279	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	280	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
	281	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
	282	10, 11, 12, 13}
	283	#define CONFIG_SYS_NAND_ECCSIZE 512
	284	#define CONFIG_SYS_NAND_ECCBYTES 3
3f719069	285	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
75c57a35	286	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
434f2cfc	287	/* NAND: SPL falcon mode configs */
	288	#ifdef CONFIG_SPL_OS_BOOT
	289	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	290	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	291	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	292	#endif
75c57a35	293
f904cdbb	294	#endif /* __CONFIG_H */