[people/ms/u-boot.git] / include / configs / omap3_logic.h

/*
 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
 *	Peter Barada <peter.barada@logicpd.com>
 *
 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
 * reference boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* High Level Configuration Options */

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */

#include <configs/ti_omap3_common.h>

/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
 * order to allow for BCH8 to fit in.
 */
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE		0x40200000

#define CONFIG_MISC_INIT_R		/* misc_init_r dumps the die id */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Hardware drivers */

/* GPIO banks */
#define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */

#define CONFIG_USB_OMAP3

/* select serial console configuration */
#undef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
#define CONFIG_SERIAL1			1	/* UART1 on OMAP Logic boards */

/* commands to include */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND_LOCK_UNLOCK	/* nand (un)lock commands	*/

/* I2C */
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM AT24C64      */
#define EXPANSION_EEPROM_I2C_BUS	2	/* I2C Bus for AT24C64 */
#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID

/* USB */
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETHER_RNDIS
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x07000000

/* TWL4030 */
#define CONFIG_TWL4030_PWM
#define CONFIG_TWL4030_USB

/* Board NAND Info. */
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC

#define CONFIG_CMD_UBIFS		/* Read-only UBI volume operations */
#define CONFIG_RBTREE			/* required by CONFIG_CMD_UBI */
#define CONFIG_LZO			/* required by CONFIG_CMD_UBIFS */

#define CONFIG_SYS_NAND_ADDR		NAND_BASE /* physical address */
						  /* to access nand */
#define CONFIG_SYS_MAX_NAND_DEVICE	1	  /* Max number of */
						  /* NAND devices */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
					 13, 14, 16, 17, 18, 19, 20, 21, 22, \
					 23, 24, 25, 26, 27, 28, 30, 31, 32, \
					 33, 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 44, 45, 46, 47, 48, 49, 50, 51, \
					 52, 53, 54, 55, 56}

#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	13
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
#define CONFIG_BCH
#define CONFIG_SYS_NAND_MAX_OOBFREE	2
#define CONFIG_SYS_NAND_MAX_ECCPOS	56
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT	"mtdparts=omap2-nand.0:"\
							"512k(MLO),"\
							"1792k(u-boot),"\
							"128k(spl-os)," \
							"128k(u-boot-env),"\
							"6m(kernel),-(fs)"
#endif

/* Environment information */

#define CONFIG_PREBOOT \
	"setenv preboot;"						\
	"nand unlock;"							\
	"saveenv;"

#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"mtdids=" MTDIDS_DEFAULT "\0"	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
	"nandrootfstype=ubifs rootwait\0" \
	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
			"if run loadbootscript; then " \
				"run bootscript; " \
			"else " \
				"run defaultboot;" \
			"fi; " \
		"else run defaultboot; fi\0" \
	"defaultboot=run mmcramboot\0" \
	"consoledevice=ttyO0\0" \
	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	"rotation=0\0" \
	"vrfb_arg=if itest ${rotation} -ne 0; then " \
		"setenv bootargs ${bootargs} omapfb.vrfb=y " \
		"omapfb.rotate=${rotation}; " \
		"fi\0" \
	"optargs=ignore_loglevel early_printk no_console_suspend\0" \
	"common_bootargs=run setconsole; setenv bootargs " \
		"${bootargs} "\
		"console=${console} " \
		"${mtdparts} "\
		"${optargs}; " \
		"run vrfb_arg\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo 'Running bootscript from mmc ...'; " \
		"source ${loadaddr}\0" \
	"loadimage=mmc rescan; " \
		"load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
	"ramdisksize=64000\0" \
	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
	"loadramdisk=mmc rescan; " \
		"load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
	"ramargs=setenv bootargs "\
		"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
	"mmcargs=setenv bootargs "\
		"root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs "\
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"nfsargs=setenv serverip ${tftpserver}; " \
		"setenv bootargs root=/dev/nfs " \
		"nfsroot=${nfsrootpath} " \
		"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
	"nfsrootpath=/opt/nfs-exports/omap\0" \
	"autoload=no\0" \
	"loadfdt=mmc rescan; " \
		"load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
	"mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loadimage; " \
		"run loadfdt;\0 " \
	"mmcbootz=setenv bootfile zImage; " \
		"run mmcbootcommon; "\
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"mmcboot=setenv bootfile uImage; "\
		"run mmcbootcommon; "\
		"bootm ${loadaddr} - ${fdtaddr}\0" \
	"mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loadimage; " \
		"run loadfdt; " \
		"run loadramdisk\0" \
	"mmcramboot=setenv bootfile uImage; " \
		"run mmcrambootcommon; " \
		"bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \
	"mmcrambootz=setenv bootfile zImage; " \
		"run mmcrambootcommon; " \
		"bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \
	"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"tftpboot ${loadaddr} ${zimage}; " \
		"tftpboot ${rdaddr} ${ramdiskimage}; " \
		"bootm ${loadaddr} ${rdaddr}\0" \
	"tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
		"dhcp;" \
		"run nfsargs;" \
		"run common_bootargs;" \
		"run dump_bootargs;" \
		"tftpboot $loadaddr zImage;" \
		"bootz $loadaddr\0" \
	"nandbootcommon=echo 'Booting kernel from NAND...';" \
		"nand unlock;" \
		"run nandargs;" \
		"run common_bootargs;" \
		"run dump_bootargs;" \
		"nand read ${loadaddr} kernel;" \
		"nand read ${fdtaddr} spl-os;\0" \
	"nandbootz=run nandbootcommon; "\
		"bootz ${loadaddr} - ${fdtaddr}\0"\
	"nandboot=run nandbootcommon; "\
		"bootm ${loadaddr} - ${fdtaddr}\0"\

#define CONFIG_BOOTCOMMAND \
	"run autoboot"

/* Miscellaneous configurable options */

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

/* FLASH and environment organization */

/* **** PISMO SUPPORT *** */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

/* SMSC922x Ethernet */
#if defined(CONFIG_CMD_NET)
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE	0x08000000
#endif /* (CONFIG_CMD_NET) */

/* Defines for SPL */

#define CONFIG_SPL_OMAP3_ID_NAND

/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif /* __CONFIG_H */
Commit	Line	Data
86887f8e PB	1	/*
	2	* (C) Copyright 2011 Logic Product Development <www.logicpd.com>
	3	* Peter Barada <peter.barada@logicpd.com>
	4	*
	5	* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
	6	* reference boards.
	7	*
3765b3e7	8	* SPDX-License-Identifier: GPL-2.0+
86887f8e PB	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
49c7303f	14	/* High Level Configuration Options */
86887f8e	15
7b77b1f6	16	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
86887f8e	17
49c7303f AF	18	#include <configs/ti_omap3_common.h>
49c7303f AF	19
fa2f81b0 TR	20	/*
	21	* We are only ever GP parts and will utilize all of the "downloaded image"
	22	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
	23	* order to allow for BCH8 to fit in.
	24	*/
f92dfc87	25	#undef CONFIG_SPL_TEXT_BASE
fa2f81b0	26	#define CONFIG_SPL_TEXT_BASE 0x40200000
f92dfc87	27
86887f8e	28	#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
49c7303f	29	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
86887f8e PB	30	#define CONFIG_SETUP_MEMORY_TAGS
	31	#define CONFIG_INITRD_TAG
	32	#define CONFIG_REVISION_TAG
	33
49c7303f	34	/* Hardware drivers */
86887f8e	35
b99353b8 AF	36	/* GPIO banks */
	37	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
	38
49c7303f AF	39	#define CONFIG_USB_OMAP3
	40
	41	/* select serial console configuration */
7b77b1f6	42	#undef CONFIG_CONS_INDEX
86887f8e PB	43	#define CONFIG_CONS_INDEX 1
	44	#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
	45	#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
	46
86887f8e	47	/* commands to include */
49c7303f	48	#define CONFIG_CMD_NAND
49c7303f	49	#define CONFIG_CMD_MTDPARTS
86887f8e	50	#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
86887f8e	51
49c7303f	52	/* I2C */
6789e84e	53	#define CONFIG_SYS_I2C_OMAP34XX
49c7303f AF	54	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
	55	#define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
	56	#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
86887f8e	57
588e41d2	58	/* USB */
588e41d2 AF	59	#define CONFIG_USB_MUSB_OMAP2PLUS
588e41d2 AF	60	#define CONFIG_USB_MUSB_PIO_ONLY
588e41d2 AF	61	#define CONFIG_USB_ETHER
588e41d2 AF	62	#define CONFIG_USB_ETHER_RNDIS
588e41d2 AF	63	#define CONFIG_USB_FUNCTION_FASTBOOT
	64	#define CONFIG_CMD_FASTBOOT
	65	#define CONFIG_ANDROID_BOOT_IMAGE
	66	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	67	#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
588e41d2	68
49c7303f AF	69	/* TWL4030 */
49c7303f AF	70	#define CONFIG_TWL4030_PWM
588e41d2	71	#define CONFIG_TWL4030_USB
7b77b1f6	72
49c7303f AF	73	/* Board NAND Info. */
49c7303f AF	74	#ifdef CONFIG_NAND
86887f8e	75	#define CONFIG_NAND_OMAP_GPMC
7b77b1f6	76
49c7303f AF	77	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	78	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	79	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
86887f8e	80
49c7303f AF	81	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	82	/* to access nand */
	83	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
	84	/* NAND devices */
55f1b39f	85	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
49c7303f AF	86	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	87	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	88	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	89	#define CONFIG_SYS_NAND_OOBSIZE 64
	90	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	91	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	92	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
	93	13, 14, 16, 17, 18, 19, 20, 21, 22, \
	94	23, 24, 25, 26, 27, 28, 30, 31, 32, \
	95	33, 34, 35, 36, 37, 38, 39, 40, 41, \
	96	42, 44, 45, 46, 47, 48, 49, 50, 51, \
	97	52, 53, 54, 55, 56}
	98
	99	#define CONFIG_SYS_NAND_ECCSIZE 512
	100	#define CONFIG_SYS_NAND_ECCBYTES 13
	101	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
	102	#define CONFIG_BCH
	103	#define CONFIG_SYS_NAND_MAX_OOBFREE 2
	104	#define CONFIG_SYS_NAND_MAX_ECCPOS 56
	105	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	106	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	107	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	108	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
12262340 AF	109	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
	110	"512k(MLO),"\
	111	"1792k(u-boot),"\
	112	"128k(spl-os)," \
	113	"128k(u-boot-env),"\
	114	"6m(kernel),-(fs)"
49c7303f	115	#endif
86887f8e PB	116
86887f8e PB	117	/* Environment information */
86887f8e	118
86887f8e	119	#define CONFIG_PREBOOT \
86887f8e	120	"setenv preboot;" \
49c7303f	121	"nand unlock;" \
86887f8e PB	122	"saveenv;"
86887f8e PB	123
86887f8e	124	#define CONFIG_EXTRA_ENV_SETTINGS \
bb5854c4	125	DEFAULT_LINUX_BOOT_ENV \
86887f8e PB	126	"mtdids=" MTDIDS_DEFAULT "\0" \
	127	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	128	"mmcdev=0\0" \
49c7303f AF	129	"mmcroot=/dev/mmcblk0p2 rw\0" \
49c7303f AF	130	"mmcrootfstype=ext4 rootwait\0" \
a094c921 AF	131	"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
a094c921 AF	132	"nandrootfstype=ubifs rootwait\0" \
66968110	133	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
86887f8e PB	134	"if run loadbootscript; then " \
	135	"run bootscript; " \
	136	"else " \
	137	"run defaultboot;" \
	138	"fi; " \
	139	"else run defaultboot; fi\0" \
	140	"defaultboot=run mmcramboot\0" \
	141	"consoledevice=ttyO0\0" \
86887f8e PB	142	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	143	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	144	"rotation=0\0" \
	145	"vrfb_arg=if itest ${rotation} -ne 0; then " \
	146	"setenv bootargs ${bootargs} omapfb.vrfb=y " \
	147	"omapfb.rotate=${rotation}; " \
	148	"fi\0" \
49c7303f	149	"optargs=ignore_loglevel early_printk no_console_suspend\0" \
476e16e8 AF	150	"common_bootargs=run setconsole; setenv bootargs " \
	151	"${bootargs} "\
	152	"console=${console} " \
	153	"${mtdparts} "\
	154	"${optargs}; " \
86887f8e	155	"run vrfb_arg\0" \
bb5854c4	156	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
86887f8e PB	157	"bootscript=echo 'Running bootscript from mmc ...'; " \
86887f8e PB	158	"source ${loadaddr}\0" \
476e16e8 AF	159	"loadimage=mmc rescan; " \
476e16e8 AF	160	"load mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
86887f8e	161	"ramdisksize=64000\0" \
86887f8e	162	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
49c7303f	163	"loadramdisk=mmc rescan; " \
bb5854c4	164	"load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
476e16e8	165	"ramargs=setenv bootargs "\
86887f8e	166	"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
476e16e8 AF	167	"mmcargs=setenv bootargs "\
	168	"root=${mmcroot} rootfstype=${mmcrootfstype}\0" \
	169	"nandargs=setenv bootargs "\
a094c921 AF	170	"root=${nandroot} " \
a094c921 AF	171	"rootfstype=${nandrootfstype}\0" \
476e16e8 AF	172	"nfsargs=setenv serverip ${tftpserver}; " \
476e16e8 AF	173	"setenv bootargs root=/dev/nfs " \
760d1afd AF	174	"nfsroot=${nfsrootpath} " \
	175	"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
	176	"nfsrootpath=/opt/nfs-exports/omap\0" \
	177	"autoload=no\0" \
bb5854c4 AF	178	"loadfdt=mmc rescan; " \
bb5854c4 AF	179	"load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
476e16e8	180	"mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \
49c7303f AF	181	"run mmcargs; " \
	182	"run common_bootargs; " \
	183	"run dump_bootargs; " \
476e16e8 AF	184	"run loadimage; " \
	185	"run loadfdt;\0 " \
	186	"mmcbootz=setenv bootfile zImage; " \
	187	"run mmcbootcommon; "\
49c7303f	188	"bootz ${loadaddr} - ${fdtaddr}\0" \
476e16e8 AF	189	"mmcboot=setenv bootfile uImage; "\
	190	"run mmcbootcommon; "\
	191	"bootm ${loadaddr} - ${fdtaddr}\0" \
	192	"mmcrambootcommon=echo 'Booting kernel from MMC w/ramdisk...'; " \
86887f8e PB	193	"run ramargs; " \
	194	"run common_bootargs; " \
	195	"run dump_bootargs; " \
476e16e8	196	"run loadimage; " \
bb5854c4	197	"run loadfdt; " \
476e16e8 AF	198	"run loadramdisk\0" \
	199	"mmcramboot=setenv bootfile uImage; " \
	200	"run mmcrambootcommon; " \
	201	"bootm ${loadaddr} ${rdaddr} ${fdtimage}\0" \
	202	"mmcrambootz=setenv bootfile zImage; " \
	203	"run mmcrambootcommon; " \
	204	"bootz ${loadaddr} ${rdaddr} ${fdtimage}\0" \
49c7303f AF	205	"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
	206	"run ramargs; " \
	207	"run common_bootargs; " \
	208	"run dump_bootargs; " \
760d1afd	209	"tftpboot ${loadaddr} ${zimage}; " \
bb5854c4 AF	210	"tftpboot ${rdaddr} ${ramdiskimage}; " \
bb5854c4 AF	211	"bootm ${loadaddr} ${rdaddr}\0" \
760d1afd AF	212	"tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
	213	"dhcp;" \
	214	"run nfsargs;" \
	215	"run common_bootargs;" \
	216	"run dump_bootargs;" \
	217	"tftpboot $loadaddr zImage;" \
476e16e8 AF	218	"bootz $loadaddr\0" \
	219	"nandbootcommon=echo 'Booting kernel from NAND...';" \
	220	"nand unlock;" \
	221	"run nandargs;" \
	222	"run common_bootargs;" \
	223	"run dump_bootargs;" \
	224	"nand read ${loadaddr} kernel;" \
	225	"nand read ${fdtaddr} spl-os;\0" \
	226	"nandbootz=run nandbootcommon; "\
	227	"bootz ${loadaddr} - ${fdtaddr}\0"\
	228	"nandboot=run nandbootcommon; "\
	229	"bootm ${loadaddr} - ${fdtaddr}\0"\
86887f8e PB	230
	231	#define CONFIG_BOOTCOMMAND \
	232	"run autoboot"
	233
49c7303f	234	/* Miscellaneous configurable options */
7b77b1f6	235
86887f8e PB	236	/* memtest works on */
	237	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	238	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	239	0x01F00000) /* 31MB */
	240
49c7303f	241	/* FLASH and environment organization */
86887f8e PB	242
86887f8e PB	243	/* ** PISMO SUPPORT * */
86887f8e	244	#if defined(CONFIG_CMD_NAND)
222a3113	245	#define CONFIG_SYS_FLASH_BASE NAND_BASE
86887f8e PB	246	#endif
	247
	248	/* Monitor at start of flash */
	249	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	250
49c7303f AF	251	#define CONFIG_ENV_IS_IN_NAND 1
49c7303f AF	252	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
86887f8e PB	253	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
86887f8e PB	254
86887f8e	255	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
49c7303f AF	256	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
49c7303f AF	257	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
86887f8e	258
49c7303f	259	/* SMSC922x Ethernet */
86887f8e	260	#if defined(CONFIG_CMD_NET)
86887f8e	261	#define CONFIG_SMC911X
1e1acc76	262	#define CONFIG_SMC911X_32_BIT
86887f8e	263	#define CONFIG_SMC911X_BASE 0x08000000
86887f8e PB	264	#endif /* (CONFIG_CMD_NET) */
86887f8e PB	265
49c7303f AF	266	/* Defines for SPL */
	267
	268	#define CONFIG_SPL_OMAP3_ID_NAND
	269
	270	/* NAND: SPL falcon mode configs */
	271	#ifdef CONFIG_SPL_OS_BOOT
	272	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	273	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	274	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	275	#endif
	276
86887f8e	277	#endif /* __CONFIG_H */