[people/ms/u-boot.git] / include / configs / omap3_logic.h

/*
 * (C) Copyright 2011 Logic Product Development <www.logicpd.com>
 *	Peter Barada <peter.barada@logicpd.com>
 *
 * Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
 * reference boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* High Level Configuration Options */

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */

#include <configs/ti_omap3_common.h>

/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
 * order to allow for BCH8 to fit in.
 */
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE		0x40200000

#define CONFIG_BOARD_LATE_INIT
#define CONFIG_MISC_INIT_R		/* misc_init_r dumps the die id */
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Hardware drivers */

/* GPIO banks */
#define CONFIG_OMAP3_GPIO_6		/* GPIO160..191 is in GPIO bank 6 */

#define CONFIG_USB_OMAP3

/* select serial console configuration */
#undef CONFIG_CONS_INDEX
#define CONFIG_CONS_INDEX		1
#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
#define CONFIG_SERIAL1			1	/* UART1 on OMAP Logic boards */

/* commands to include */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_NAND_LOCK_UNLOCK	/* nand (un)lock commands	*/

/* I2C */
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* EEPROM AT24C64      */
#define EXPANSION_EEPROM_I2C_BUS	2	/* I2C Bus for AT24C64 */
#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID

/* USB */
#define CONFIG_USB_MUSB_OMAP2PLUS
#define CONFIG_USB_MUSB_PIO_ONLY
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETHER_RNDIS
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x07000000

/* TWL4030 */
#define CONFIG_TWL4030_PWM
#define CONFIG_TWL4030_USB

/* Board NAND Info. */
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC

#define CONFIG_CMD_UBIFS		/* Read-only UBI volume operations */
#define CONFIG_RBTREE			/* required by CONFIG_CMD_UBI */
#define CONFIG_LZO			/* required by CONFIG_CMD_UBIFS */

#define CONFIG_SYS_NAND_ADDR		NAND_BASE /* physical address */
						  /* to access nand */
#define CONFIG_SYS_MAX_NAND_DEVICE	1	  /* Max number of */
						  /* NAND devices */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
					 13, 14, 16, 17, 18, 19, 20, 21, 22, \
					 23, 24, 25, 26, 27, 28, 30, 31, 32, \
					 33, 34, 35, 36, 37, 38, 39, 40, 41, \
					 42, 44, 45, 46, 47, 48, 49, 50, 51, \
					 52, 53, 54, 55, 56}

#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	13
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
#define CONFIG_BCH
#define CONFIG_SYS_NAND_MAX_OOBFREE	2
#define CONFIG_SYS_NAND_MAX_ECCPOS	56
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT	"mtdparts=omap2-nand.0:"\
							"512k(MLO),"\
							"1792k(u-boot),"\
							"128k(spl-os)," \
							"128k(u-boot-env),"\
							"6m(kernel),-(fs)"
#endif

/* Environment information */

#define CONFIG_PREBOOT \
	"setenv preboot;"						\
	"nand unlock;"							\
	"saveenv;"

#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"mtdids=" MTDIDS_DEFAULT "\0"	\
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
	"nandrootfstype=ubifs rootwait\0" \
	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
			"if run loadbootscript; then " \
				"run bootscript; " \
			"else " \
				"run defaultboot;" \
			"fi; " \
		"else run defaultboot; fi\0" \
	"defaultboot=run mmcramboot\0" \
	"consoledevice=ttyO0\0" \
	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	"rotation=0\0" \
	"vrfb_arg=if itest ${rotation} -ne 0; then " \
		"setenv bootargs ${bootargs} omapfb.vrfb=y " \
		"omapfb.rotate=${rotation}; " \
		"fi\0" \
	"optargs=ignore_loglevel early_printk no_console_suspend\0" \
	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
	"common_bootargs=setenv bootargs ${bootargs} " \
		"${optargs};" \
		"run addmtdparts; " \
		"run vrfb_arg\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo 'Running bootscript from mmc ...'; " \
		"source ${loadaddr}\0" \
	"loaduimage=mmc rescan; " \
		"load mmc ${mmcdev} ${loadaddr} uImage\0" \
	"loadzimage=mmc rescan; " \
		"load mmc ${mmcdev} ${loadaddr} zImage\0" \
	"ramdisksize=64000\0" \
	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
	"loadramdisk=mmc rescan; " \
		"load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
	"ramargs=run setconsole; setenv bootargs console=${console} " \
		"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
	"mmcargs=run setconsole; setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=run setconsole; setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"nfsargs=run setconsole; setenv serverip ${tftpserver}; " \
		"setenv bootargs console=${console} root=/dev/nfs " \
		"nfsroot=${nfsrootpath} " \
		"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
	"nfsrootpath=/opt/nfs-exports/omap\0" \
	"autoload=no\0" \
	"loadfdt=mmc rescan; " \
		"load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
		"run mmcargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loadzimage; " \
		"run loadfdt; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loaduimage; " \
		"run loadramdisk; " \
		"bootm ${loadaddr} ${rdaddr}\0" \
	"mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"run loadzimage; " \
		"run loadramdisk; " \
		"run loadfdt; " \
		"bootz ${loadaddr} ${rdaddr} ${fdtaddr};\0" \
	"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
		"run ramargs; " \
		"run common_bootargs; " \
		"run dump_bootargs; " \
		"tftpboot ${loadaddr} ${zimage}; " \
		"tftpboot ${rdaddr} ${ramdiskimage}; " \
		"bootm ${loadaddr} ${rdaddr}\0" \
	"tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
		"dhcp;" \
		"run nfsargs;" \
		"run common_bootargs;" \
		"run dump_bootargs;" \
		"tftpboot $loadaddr zImage;" \
		"bootz $loadaddr\0"

#define CONFIG_BOOTCOMMAND \
	"run autoboot"

/* Miscellaneous configurable options */

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

/* FLASH and environment organization */

/* **** PISMO SUPPORT *** */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

/* SMSC922x Ethernet */
#if defined(CONFIG_CMD_NET)
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE	0x08000000
#endif /* (CONFIG_CMD_NET) */

/* Defines for SPL */

#define CONFIG_SPL_OMAP3_ID_NAND

/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif /* __CONFIG_H */
Commit	Line	Data
86887f8e PB	1	/*
	2	* (C) Copyright 2011 Logic Product Development <www.logicpd.com>
	3	* Peter Barada <peter.barada@logicpd.com>
	4	*
	5	* Configuration settings for the Logic OMAP35x/DM37x SOM LV/Torpedo
	6	* reference boards.
	7	*
3765b3e7	8	* SPDX-License-Identifier: GPL-2.0+
86887f8e PB	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
49c7303f	14	/* High Level Configuration Options */
86887f8e	15
7b77b1f6	16	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
86887f8e	17
49c7303f AF	18	#include <configs/ti_omap3_common.h>
49c7303f AF	19
fa2f81b0 TR	20	/*
	21	* We are only ever GP parts and will utilize all of the "downloaded image"
	22	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in
	23	* order to allow for BCH8 to fit in.
	24	*/
f92dfc87	25	#undef CONFIG_SPL_TEXT_BASE
fa2f81b0	26	#define CONFIG_SPL_TEXT_BASE 0x40200000
f92dfc87	27
26ef7a27	28	#define CONFIG_BOARD_LATE_INIT
86887f8e	29	#define CONFIG_MISC_INIT_R /* misc_init_r dumps the die id */
49c7303f	30	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
86887f8e PB	31	#define CONFIG_SETUP_MEMORY_TAGS
	32	#define CONFIG_INITRD_TAG
	33	#define CONFIG_REVISION_TAG
	34
49c7303f	35	/* Hardware drivers */
86887f8e	36
b99353b8 AF	37	/* GPIO banks */
	38	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
	39
49c7303f AF	40	#define CONFIG_USB_OMAP3
	41
	42	/* select serial console configuration */
7b77b1f6	43	#undef CONFIG_CONS_INDEX
86887f8e PB	44	#define CONFIG_CONS_INDEX 1
	45	#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
	46	#define CONFIG_SERIAL1 1 /* UART1 on OMAP Logic boards */
	47
86887f8e	48	/* commands to include */
49c7303f	49	#define CONFIG_CMD_NAND
49c7303f	50	#define CONFIG_CMD_MTDPARTS
86887f8e	51	#define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
86887f8e	52
49c7303f	53	/* I2C */
6789e84e	54	#define CONFIG_SYS_I2C_OMAP34XX
49c7303f AF	55	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM AT24C64 */
	56	#define EXPANSION_EEPROM_I2C_BUS 2 /* I2C Bus for AT24C64 */
	57	#define CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID
86887f8e	58
588e41d2	59	/* USB */
588e41d2 AF	60	#define CONFIG_USB_MUSB_OMAP2PLUS
588e41d2 AF	61	#define CONFIG_USB_MUSB_PIO_ONLY
588e41d2 AF	62	#define CONFIG_USB_ETHER
588e41d2 AF	63	#define CONFIG_USB_ETHER_RNDIS
588e41d2 AF	64	#define CONFIG_USB_FUNCTION_FASTBOOT
	65	#define CONFIG_CMD_FASTBOOT
	66	#define CONFIG_ANDROID_BOOT_IMAGE
	67	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	68	#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
588e41d2	69
49c7303f AF	70	/* TWL4030 */
49c7303f AF	71	#define CONFIG_TWL4030_PWM
588e41d2	72	#define CONFIG_TWL4030_USB
7b77b1f6	73
49c7303f AF	74	/* Board NAND Info. */
49c7303f AF	75	#ifdef CONFIG_NAND
86887f8e	76	#define CONFIG_NAND_OMAP_GPMC
7b77b1f6	77
49c7303f AF	78	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	79	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	80	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
86887f8e	81
49c7303f AF	82	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	83	/* to access nand */
	84	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
	85	/* NAND devices */
55f1b39f	86	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
49c7303f AF	87	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	88	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	89	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	90	#define CONFIG_SYS_NAND_OOBSIZE 64
	91	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	92	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	93	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
	94	13, 14, 16, 17, 18, 19, 20, 21, 22, \
	95	23, 24, 25, 26, 27, 28, 30, 31, 32, \
	96	33, 34, 35, 36, 37, 38, 39, 40, 41, \
	97	42, 44, 45, 46, 47, 48, 49, 50, 51, \
	98	52, 53, 54, 55, 56}
	99
	100	#define CONFIG_SYS_NAND_ECCSIZE 512
	101	#define CONFIG_SYS_NAND_ECCBYTES 13
	102	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
	103	#define CONFIG_BCH
	104	#define CONFIG_SYS_NAND_MAX_OOBFREE 2
	105	#define CONFIG_SYS_NAND_MAX_ECCPOS 56
	106	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	107	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	108	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	109	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
12262340 AF	110	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"\
	111	"512k(MLO),"\
	112	"1792k(u-boot),"\
	113	"128k(spl-os)," \
	114	"128k(u-boot-env),"\
	115	"6m(kernel),-(fs)"
49c7303f	116	#endif
86887f8e PB	117
86887f8e PB	118	/* Environment information */
86887f8e	119
86887f8e	120	#define CONFIG_PREBOOT \
86887f8e	121	"setenv preboot;" \
49c7303f	122	"nand unlock;" \
86887f8e PB	123	"saveenv;"
86887f8e PB	124
86887f8e	125	#define CONFIG_EXTRA_ENV_SETTINGS \
bb5854c4	126	DEFAULT_LINUX_BOOT_ENV \
86887f8e PB	127	"mtdids=" MTDIDS_DEFAULT "\0" \
	128	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	129	"mmcdev=0\0" \
49c7303f AF	130	"mmcroot=/dev/mmcblk0p2 rw\0" \
49c7303f AF	131	"mmcrootfstype=ext4 rootwait\0" \
a094c921 AF	132	"nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \
a094c921 AF	133	"nandrootfstype=ubifs rootwait\0" \
66968110	134	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
86887f8e PB	135	"if run loadbootscript; then " \
	136	"run bootscript; " \
	137	"else " \
	138	"run defaultboot;" \
	139	"fi; " \
	140	"else run defaultboot; fi\0" \
	141	"defaultboot=run mmcramboot\0" \
	142	"consoledevice=ttyO0\0" \
86887f8e PB	143	"setconsole=setenv console ${consoledevice},${baudrate}n8\0" \
	144	"dump_bootargs=echo 'Bootargs: '; echo $bootargs\0" \
	145	"rotation=0\0" \
	146	"vrfb_arg=if itest ${rotation} -ne 0; then " \
	147	"setenv bootargs ${bootargs} omapfb.vrfb=y " \
	148	"omapfb.rotate=${rotation}; " \
	149	"fi\0" \
49c7303f	150	"optargs=ignore_loglevel early_printk no_console_suspend\0" \
86887f8e	151	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0" \
208d14ba	152	"common_bootargs=setenv bootargs ${bootargs} " \
49c7303f	153	"${optargs};" \
86887f8e PB	154	"run addmtdparts; " \
86887f8e PB	155	"run vrfb_arg\0" \
bb5854c4	156	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
86887f8e PB	157	"bootscript=echo 'Running bootscript from mmc ...'; " \
86887f8e PB	158	"source ${loadaddr}\0" \
49c7303f	159	"loaduimage=mmc rescan; " \
bb5854c4	160	"load mmc ${mmcdev} ${loadaddr} uImage\0" \
49c7303f	161	"loadzimage=mmc rescan; " \
bb5854c4	162	"load mmc ${mmcdev} ${loadaddr} zImage\0" \
86887f8e	163	"ramdisksize=64000\0" \
86887f8e	164	"ramdiskimage=rootfs.ext2.gz.uboot\0" \
49c7303f	165	"loadramdisk=mmc rescan; " \
bb5854c4	166	"load mmc ${mmcdev} ${rdaddr} ${ramdiskimage}\0" \
86887f8e PB	167	"ramargs=run setconsole; setenv bootargs console=${console} " \
86887f8e PB	168	"root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \
49c7303f AF	169	"mmcargs=run setconsole; setenv bootargs console=${console} " \
	170	"${optargs} " \
	171	"root=${mmcroot} " \
	172	"rootfstype=${mmcrootfstype}\0" \
a094c921 AF	173	"nandargs=run setconsole; setenv bootargs console=${console} " \
	174	"${optargs} " \
	175	"root=${nandroot} " \
	176	"rootfstype=${nandrootfstype}\0" \
760d1afd AF	177	"nfsargs=run setconsole; setenv serverip ${tftpserver}; " \
	178	"setenv bootargs console=${console} root=/dev/nfs " \
	179	"nfsroot=${nfsrootpath} " \
	180	"ip=${ipaddr}:${tftpserver}:${gatewayip}:${netmask}::eth0:off\0" \
	181	"nfsrootpath=/opt/nfs-exports/omap\0" \
	182	"autoload=no\0" \
bb5854c4 AF	183	"loadfdt=mmc rescan; " \
bb5854c4 AF	184	"load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \
49c7303f AF	185	"mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
	186	"run mmcargs; " \
	187	"run common_bootargs; " \
	188	"run dump_bootargs; " \
	189	"run loadzimage; " \
bb5854c4	190	"run loadfdt; " \
49c7303f AF	191	"bootz ${loadaddr} - ${fdtaddr}\0" \
49c7303f AF	192	"mmcramboot=echo 'Booting uImage kernel from mmc w/ramdisk...'; " \
86887f8e PB	193	"run ramargs; " \
	194	"run common_bootargs; " \
	195	"run dump_bootargs; " \
	196	"run loaduimage; " \
49c7303f	197	"run loadramdisk; " \
bb5854c4	198	"bootm ${loadaddr} ${rdaddr}\0" \
49c7303f	199	"mmcrambootz=echo 'Booting zImage kernel from mmc w/ramdisk...'; " \
86887f8e PB	200	"run ramargs; " \
	201	"run common_bootargs; " \
	202	"run dump_bootargs; " \
49c7303f AF	203	"run loadzimage; " \
49c7303f AF	204	"run loadramdisk; " \
bb5854c4 AF	205	"run loadfdt; " \
bb5854c4 AF	206	"bootz ${loadaddr} ${rdaddr} ${fdtaddr};\0" \
49c7303f AF	207	"tftpboot=echo 'Booting kernel/ramdisk rootfs from tftp...'; " \
	208	"run ramargs; " \
	209	"run common_bootargs; " \
	210	"run dump_bootargs; " \
760d1afd	211	"tftpboot ${loadaddr} ${zimage}; " \
bb5854c4 AF	212	"tftpboot ${rdaddr} ${ramdiskimage}; " \
bb5854c4 AF	213	"bootm ${loadaddr} ${rdaddr}\0" \
760d1afd AF	214	"tftpbootz=echo 'Booting kernel NFS rootfs...'; " \
	215	"dhcp;" \
	216	"run nfsargs;" \
	217	"run common_bootargs;" \
	218	"run dump_bootargs;" \
	219	"tftpboot $loadaddr zImage;" \
	220	"bootz $loadaddr\0"
86887f8e PB	221
	222	#define CONFIG_BOOTCOMMAND \
	223	"run autoboot"
	224
49c7303f	225	/* Miscellaneous configurable options */
7b77b1f6	226
86887f8e PB	227	/* memtest works on */
	228	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	229	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	230	0x01F00000) /* 31MB */
	231
49c7303f	232	/* FLASH and environment organization */
86887f8e PB	233
86887f8e PB	234	/* ** PISMO SUPPORT * */
86887f8e	235	#if defined(CONFIG_CMD_NAND)
222a3113	236	#define CONFIG_SYS_FLASH_BASE NAND_BASE
86887f8e PB	237	#endif
	238
	239	/* Monitor at start of flash */
	240	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	241
49c7303f AF	242	#define CONFIG_ENV_IS_IN_NAND 1
49c7303f AF	243	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
86887f8e PB	244	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
86887f8e PB	245
86887f8e	246	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
49c7303f AF	247	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
49c7303f AF	248	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
86887f8e	249
49c7303f	250	/* SMSC922x Ethernet */
86887f8e	251	#if defined(CONFIG_CMD_NET)
86887f8e	252	#define CONFIG_SMC911X
1e1acc76	253	#define CONFIG_SMC911X_32_BIT
86887f8e	254	#define CONFIG_SMC911X_BASE 0x08000000
86887f8e PB	255	#endif /* (CONFIG_CMD_NET) */
86887f8e PB	256
49c7303f AF	257	/* Defines for SPL */
	258
	259	#define CONFIG_SPL_OMAP3_ID_NAND
	260
	261	/* NAND: SPL falcon mode configs */
	262	#ifdef CONFIG_SPL_OS_BOOT
	263	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	264	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	265	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	266	#endif
	267
86887f8e	268	#endif /* __CONFIG_H */