[people/ms/u-boot.git] / include / configs / omap3_overo.h

/*
 * Configuration settings for the Gumstix Overo board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
#define CONFIG_NAND

#include <configs/ti_omap3_common.h>
/*
 * We are only ever GP parts and will utilize all of the "downloaded image"
 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
 */
#undef CONFIG_SPL_TEXT_BASE
#define CONFIG_SPL_TEXT_BASE		0x40200000

#define CONFIG_BCH

/* call misc_init_r */
#define CONFIG_MISC_INIT_R

/* pass the revision tag */
#define CONFIG_REVISION_TAG

/* override size of malloc() pool */
#undef CONFIG_SYS_MALLOC_LEN
#define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB sector */
/* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
 * Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
#define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + (128 << 15))

/* I2C Support */
#define CONFIG_SYS_I2C_OMAP34XX

/* TWL4030 LED */
#define CONFIG_TWL4030_LED

/* USB EHCI */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_OMAP
#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	183
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	3

/* Initialize GPIOs by default */
#define CONFIG_OMAP3_GPIO_2	/* GPIO32..63 is in GPIO Bank 2 */
#define CONFIG_OMAP3_GPIO_3	/* GPIO64..95 is in GPIO Bank 3 */
#define CONFIG_OMAP3_GPIO_4	/* GPIO96..127 is in GPIO Bank 4 */
#define CONFIG_OMAP3_GPIO_5	/* GPIO128..159 is in GPIO Bank 5 */
#define CONFIG_OMAP3_GPIO_6	/* GPIO160..191 is in GPIO Bank 6 */

/* commands to include */

#ifdef CONFIG_NAND
#define CONFIG_CMD_UBIFS	/* Read-only UBI volume operations */

#define CONFIG_RBTREE		/* required by CONFIG_CMD_UBI */
#define CONFIG_LZO		/* required by CONFIG_CMD_UBIFS */

#define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */

/* NAND block size is 128 KiB.  Synchronize these values with
 * overo_nand_partitions in mach-omap2/board-overo.c in Linux:
 *  xloader              4 * NAND_BLOCK_SIZE = 512 KiB
 *  uboot               14 * NAND_BLOCK_SIZE = 1792 KiB
 *  uboot environtment   2 * NAND_BLOCK_SIZE = 256 KiB
 *  linux               64 * NAND_BLOCK_SIZE = 8 MiB
 *  rootfs              remainder
 */
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
	"512k(xloader),"				\
	"1792k(u-boot),"				\
	"256k(environ),"				\
	"8m(linux),"					\
	"-(rootfs)"
#else /* CONFIG_NAND */
#define MTDPARTS_DEFAULT
#endif /* CONFIG_NAND */

/* Board NAND Info. */
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	"bootdir=/boot\0" \
	"bootfile=zImage\0" \
	"usbtty=cdc_acm\0" \
	"console=ttyO2,115200n8\0" \
	"mpurate=auto\0" \
	"optargs=\0" \
	"vram=12M\0" \
	"dvimode=1024x768MR-16@60\0" \
	"defaultdisplay=dvi\0" \
	"mmcdev=0\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext4 rootwait\0" \
	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
	"nandrootfstype=ubifs\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"mpurate=${mpurate} " \
		"vram=${vram} " \
		"omapfb.mode=dvi:${dvimode} " \
		"omapdss.def_disp=${defaultdisplay} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running boot script from mmc ...; " \
		"source ${loadaddr}\0" \
	"loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t ${loadaddr} ${filesize}\0" \
	"loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
	"mmcboot=echo Booting from mmc...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"mmcbootfdt=echo Booting with DT from mmc ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"if nand read ${loadaddr} linux; then " \
			"bootm ${loadaddr};" \
		"fi;\0" \
	"nanddtsboot=echo Booting from nand with DTS...; " \
		"run nandargs; " \
		"ubi part rootfs; "\
		"ubifsmount ubi0:rootfs; "\
		"run loadubifdt; "\
		"run loadubizimage; "\
		"bootz ${loadaddr} - ${fdtaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"fi;" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loaduimage; then " \
			"run mmcboot;" \
		"fi;" \
		"if run loadzimage; then " \
			"if test -z \"${fdtfile}\"; then " \
				"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
			"fi;" \
			"if run loadfdt; then " \
				"run mmcbootfdt;" \
			"fi;" \
		"fi;" \
	"fi;" \
	"run nandboot; " \
	"if test -z \"${fdtfile}\"; then "\
		"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	"fi;" \
	"run nanddtsboot; " \

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

/* FLASH and environment organization */
#if defined(CONFIG_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND
#define ONENAND_ENV_OFFSET		0x240000 /* environment starts here */
#define SMNAND_ENV_OFFSET		0x240000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

/* Configure SMSC9211 ethernet */
#if defined(CONFIG_CMD_NET)
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE		0x2C000000
#endif /* (CONFIG_CMD_NET) */

/* Initial RAM setup */
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800

/* NAND boot config */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_MAX_ECCPOS  56
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS      {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
					13, 14, 16, 17, 18, 19, 20, 21, 22, \
					23, 24, 25, 26, 27, 28, 30, 31, 32, \
					33, 34, 35, 36, 37, 38, 39, 40, 41, \
					42, 44, 45, 46, 47, 48, 49, 50, 51, \
					52, 53, 54, 55, 56}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	13
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif

#endif				/* __CONFIG_H */
Commit	Line	Data
9d0fc811 DB	1	/*
	2	* Configuration settings for the Gumstix Overo board.
	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
9d0fc811 DB	5	*/
	6
	7	#ifndef __CONFIG_H
	8	#define __CONFIG_H
9d0fc811	9
29cc1d8e AC	10	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
29cc1d8e AC	11	#define CONFIG_NAND
cae377b5	12
29cc1d8e	13	#include <configs/ti_omap3_common.h>
fa2f81b0 TR	14	/*
	15	* We are only ever GP parts and will utilize all of the "downloaded image"
	16	* area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
	17	*/
ce170a1c	18	#undef CONFIG_SPL_TEXT_BASE
fa2f81b0	19	#define CONFIG_SPL_TEXT_BASE 0x40200000
ce170a1c AC	20
ce170a1c AC	21	#define CONFIG_BCH
9d0fc811	22
29cc1d8e	23	/* call misc_init_r */
9d0fc811 DB	24	#define CONFIG_MISC_INIT_R
9d0fc811 DB	25
29cc1d8e	26	/* pass the revision tag */
0f8d3eb9	27	#define CONFIG_REVISION_TAG
9d0fc811	28
29cc1d8e AC	29	/* override size of malloc() pool */
29cc1d8e AC	30	#undef CONFIG_SYS_MALLOC_LEN
dbba3daf	31	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
dbba3daf AC	32	/* Shift 128 << 15 provides 4 MiB heap to support UBI commands.
	33	* Shift 128 << 10 provides 128 KiB heap for limited-memory devices. */
	34	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 15))
9d0fc811	35
29cc1d8e AC	36	/* I2C Support */
29cc1d8e AC	37	#define CONFIG_SYS_I2C_OMAP34XX
9d0fc811	38
29cc1d8e AC	39	/* TWL4030 LED */
29cc1d8e AC	40	#define CONFIG_TWL4030_LED
9d0fc811	41
f5c30c1b SH	42	/* USB EHCI */
	43	#define CONFIG_USB_EHCI
	44	#define CONFIG_USB_EHCI_OMAP
f5c30c1b SH	45	#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 183
	46	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
	47
29cc1d8e	48	/* Initialize GPIOs by default */
06ae2b0c AC	49	#define CONFIG_OMAP3_GPIO_2 /* GPIO32..63 is in GPIO Bank 2 */
	50	#define CONFIG_OMAP3_GPIO_3 /* GPIO64..95 is in GPIO Bank 3 */
	51	#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
	52	#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO Bank 5 */
	53	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
	54
9d0fc811	55	/* commands to include */
dbba3daf	56
29cc1d8e	57	#ifdef CONFIG_NAND
dbba3daf AC	58	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	59
	60	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	61	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
	62
dbba3daf AC	63	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	64
	65	/* NAND block size is 128 KiB. Synchronize these values with
	66	* overo_nand_partitions in mach-omap2/board-overo.c in Linux:
	67	* xloader 4 * NAND_BLOCK_SIZE = 512 KiB
	68	* uboot 14 * NAND_BLOCK_SIZE = 1792 KiB
	69	* uboot environtment 2 * NAND_BLOCK_SIZE = 256 KiB
e5c809d7	70	* linux 64 * NAND_BLOCK_SIZE = 8 MiB
dbba3daf AC	71	* rootfs remainder
	72	*/
	73	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	74	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
	75	"512k(xloader)," \
	76	"1792k(u-boot)," \
	77	"256k(environ)," \
e5c809d7	78	"8m(linux)," \
dbba3daf	79	"-(rootfs)"
29cc1d8e	80	#else /* CONFIG_NAND */
dbba3daf	81	#define MTDPARTS_DEFAULT
29cc1d8e	82	#endif /* CONFIG_NAND */
dbba3daf	83
29cc1d8e	84	/* Board NAND Info. */
9d0fc811 DB	85	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
9d0fc811 DB	86	/* to access nand */
9d0fc811	87	/* Environment information */
9d0fc811	88	#define CONFIG_EXTRA_ENV_SETTINGS \
29cc1d8e	89	DEFAULT_LINUX_BOOT_ENV \
3c92c323 AC	90	"bootdir=/boot\0" \
	91	"bootfile=zImage\0" \
	92	"usbtty=cdc_acm\0" \
75b988a2	93	"console=ttyO2,115200n8\0" \
3c92c323	94	"mpurate=auto\0" \
e6847dba	95	"optargs=\0" \
13d2cb98 SS	96	"vram=12M\0" \
	97	"dvimode=1024x768MR-16@60\0" \
	98	"defaultdisplay=dvi\0" \
cd7c5726	99	"mmcdev=0\0" \
13d2cb98	100	"mmcroot=/dev/mmcblk0p2 rw\0" \
1584e4f4	101	"mmcrootfstype=ext4 rootwait\0" \
254973e6 SS	102	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
254973e6 SS	103	"nandrootfstype=ubifs\0" \
dbba3daf	104	"mtdparts=" MTDPARTS_DEFAULT "\0" \
9d0fc811	105	"mmcargs=setenv bootargs console=${console} " \
e6847dba	106	"${optargs} " \
5af32460	107	"mpurate=${mpurate} " \
13d2cb98 SS	108	"vram=${vram} " \
13d2cb98 SS	109	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	110	"omapdss.def_disp=${defaultdisplay} " \
	111	"root=${mmcroot} " \
	112	"rootfstype=${mmcrootfstype}\0" \
9d0fc811	113	"nandargs=setenv bootargs console=${console} " \
e6847dba	114	"${optargs} " \
5af32460	115	"mpurate=${mpurate} " \
13d2cb98 SS	116	"vram=${vram} " \
13d2cb98 SS	117	"omapfb.mode=dvi:${dvimode} " \
13d2cb98 SS	118	"omapdss.def_disp=${defaultdisplay} " \
	119	"root=${nandroot} " \
	120	"rootfstype=${nandrootfstype}\0" \
3c92c323 AC	121	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
3c92c323 AC	122	"bootscript=echo Running boot script from mmc ...; " \
74de7aef	123	"source ${loadaddr}\0" \
3c92c323 AC	124	"loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
3c92c323 AC	125	"importbootenv=echo Importing environment from mmc ...; " \
0b3fde11	126	"env import -t ${loadaddr} ${filesize}\0" \
3c92c323 AC	127	"loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
3c92c323 AC	128	"mmcboot=echo Booting from mmc...; " \
9d0fc811 DB	129	"run mmcargs; " \
9d0fc811 DB	130	"bootm ${loadaddr}\0" \
3c92c323	131	"loadzimage=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}\0" \
29cc1d8e	132	"loadfdt=load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${fdtfile}\0" \
88d89668 AC	133	"loadubizimage=ubifsload ${loadaddr} ${bootdir}/${bootfile}\0" \
88d89668 AC	134	"loadubifdt=ubifsload ${fdtaddr} ${bootdir}/${fdtfile}\0" \
3c92c323 AC	135	"mmcbootfdt=echo Booting with DT from mmc ...; " \
3c92c323 AC	136	"run mmcargs; " \
29cc1d8e	137	"bootz ${loadaddr} - ${fdtaddr}\0" \
9d0fc811 DB	138	"nandboot=echo Booting from nand ...; " \
9d0fc811 DB	139	"run nandargs; " \
f2565a55 SH	140	"if nand read ${loadaddr} linux; then " \
	141	"bootm ${loadaddr};" \
	142	"fi;\0" \
88d89668 AC	143	"nanddtsboot=echo Booting from nand with DTS...; " \
	144	"run nandargs; " \
	145	"ubi part rootfs; "\
	146	"ubifsmount ubi0:rootfs; "\
	147	"run loadubifdt; "\
	148	"run loadubizimage; "\
	149	"bootz ${loadaddr} - ${fdtaddr}\0" \
9d0fc811 DB	150
9d0fc811 DB	151	#define CONFIG_BOOTCOMMAND \
66968110	152	"mmc dev ${mmcdev}; if mmc rescan; then " \
9d0fc811 DB	153	"if run loadbootscript; then " \
9d0fc811 DB	154	"run bootscript; " \
3c92c323 AC	155	"fi;" \
	156	"if run loadbootenv; then " \
	157	"echo Loaded environment from ${bootenv};" \
	158	"run importbootenv;" \
	159	"fi;" \
	160	"if test -n $uenvcmd; then " \
	161	"echo Running uenvcmd ...;" \
	162	"run uenvcmd;" \
	163	"fi;" \
	164	"if run loaduimage; then " \
	165	"run mmcboot;" \
	166	"fi;" \
	167	"if run loadzimage; then " \
115e71f7	168	"if test -z \"${fdtfile}\"; then " \
12cc5437 AC	169	"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	170	"fi;" \
	171	"if run loadfdt; then " \
	172	"run mmcbootfdt;" \
0b3fde11	173	"fi;" \
3c92c323 AC	174	"fi;" \
	175	"fi;" \
	176	"run nandboot; " \
88d89668 AC	177	"if test -z \"${fdtfile}\"; then "\
	178	"setenv fdtfile omap3-${boardname}-${expansionname}.dtb;" \
	179	"fi;" \
	180	"run nanddtsboot; " \
9d0fc811	181
9d0fc811 DB	182	/* memtest works on */
	183	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	184	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	185	0x01F00000) /* 31MB */
	186
29cc1d8e	187	/* FLASH and environment organization */
29cc1d8e	188	#if defined(CONFIG_NAND)
222a3113	189	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	190	#endif
9d0fc811 DB	191
	192	/* Monitor at start of flash */
	193	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	194	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	195
0f8d3eb9	196	#define CONFIG_ENV_IS_IN_NAND
9d0fc811 DB	197	#define ONENAND_ENV_OFFSET 0x240000 /* environment starts here */
	198	#define SMNAND_ENV_OFFSET 0x240000 /* environment starts here */
	199
6cbec7b3 LC	200	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	201	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
9d0fc811 DB	202	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
9d0fc811 DB	203
29cc1d8e	204	/* Configure SMSC9211 ethernet */
df382626	205	#if defined(CONFIG_CMD_NET)
0f8d3eb9	206	#define CONFIG_SMC911X
df382626	207	#define CONFIG_SMC911X_32_BIT
0f8d3eb9	208	#define CONFIG_SMC911X_BASE 0x2C000000
df382626 OJ	209	#endif /* (CONFIG_CMD_NET) */
df382626 OJ	210
29cc1d8e	211	/* Initial RAM setup */
31bfcf1c SS	212	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
31bfcf1c SS	213	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
8e40852f	214
137703b8	215	/* NAND boot config */
55f1b39f	216	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
ce170a1c	217	#define CONFIG_SYS_NAND_MAX_ECCPOS 56
137703b8 AM	218	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	219	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	220	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	221	#define CONFIG_SYS_NAND_OOBSIZE 64
	222	#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
	223	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
ce170a1c AC	224	#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
	225	13, 14, 16, 17, 18, 19, 20, 21, 22, \
	226	23, 24, 25, 26, 27, 28, 30, 31, 32, \
	227	33, 34, 35, 36, 37, 38, 39, 40, 41, \
	228	42, 44, 45, 46, 47, 48, 49, 50, 51, \
	229	52, 53, 54, 55, 56}
137703b8	230	#define CONFIG_SYS_NAND_ECCSIZE 512
ce170a1c AC	231	#define CONFIG_SYS_NAND_ECCBYTES 13
ce170a1c AC	232	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
137703b8 AM	233	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
137703b8 AM	234	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
434f2cfc	235	/* NAND: SPL falcon mode configs */
	236	#ifdef CONFIG_SPL_OS_BOOT
	237	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	238	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	239	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	240	#endif
137703b8	241
9d0fc811	242	#endif /* __CONFIG_H */