[people/ms/u-boot.git] / include / configs / omap3_pandora.h

/*
 * (C) Copyright 2008-2010
 * Gražvydas Ignotas <notasas@gmail.com>
 *
 * Configuration settings for the OMAP3 Pandora.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_OMAP		1	/* in a TI OMAP core */
#define CONFIG_OMAP34XX		1	/* which is a 34XX */
#define CONFIG_OMAP3_PANDORA	1	/* working with pandora */
#define CONFIG_OMAP_GPIO

#define CONFIG_SDRC	/* The chip has SDRC controller */

#include <asm/arch/cpu.h>	/* get chip and board defs */
#include <asm/arch/omap3.h>

/*
 * Display CPU and Board information
 */
#define CONFIG_DISPLAY_CPUINFO		1
#define CONFIG_DISPLAY_BOARDINFO	1

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

#define CONFIG_MISC_INIT_R

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1
#define CONFIG_REVISION_TAG		1

#define CONFIG_OF_LIBFDT		1

/*
 * Size of malloc() pool
 */
#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024 + CONFIG_ENV_SIZE)

/*
 * Hardware drivers
 */

#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
#define CONFIG_SYS_DEVICE_NULLDEV	1

/* USB */
#define CONFIG_MUSB_UDC			1
#define CONFIG_USB_OMAP3		1
#define CONFIG_TWL4030_USB		1

/* USB device configuration */
#define CONFIG_USB_DEVICE		1
#define CONFIG_USB_TTY			1

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
#define CONFIG_SERIAL3			3

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
					115200}
#define CONFIG_GENERIC_MMC		1
#define CONFIG_MMC			1
#define CONFIG_OMAP_HSMMC		1
#define CONFIG_DOS_PARTITION		1

/* commands to include */
#include <config_cmd_default.h>

#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
#define CONFIG_CMD_FAT		/* FAT support			*/

#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
#define CONFIG_CMD_MMC		/* MMC support			*/
#define CONFIG_CMD_NAND		/* NAND support			*/
#define CONFIG_CMD_CACHE	/* Cache control		*/

#undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
#undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
#undef CONFIG_CMD_IMI		/* iminfo			*/
#undef CONFIG_CMD_IMLS		/* List all found images	*/
#undef CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
#undef CONFIG_CMD_NFS		/* NFS support			*/

#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C			1
#define CONFIG_SYS_I2C_SPEED		100000
#define CONFIG_SYS_I2C_SLAVE		1
#define CONFIG_DRIVER_OMAP34XX_I2C	1

/*
 * TWL4030
 */
#define CONFIG_TWL4030_POWER		1
#define CONFIG_TWL4030_LED		1

/*
 * Board NAND Info.
 */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
							/* to access nand */
							/* at CS0 */
#define GPMC_NAND_ECC_LP_x16_LAYOUT	1

#define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
						/* devices */

#ifdef CONFIG_CMD_NAND
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_UBI
#define CONFIG_CMD_UBIFS
#define CONFIG_RBTREE
#define CONFIG_LZO

#define MTDIDS_DEFAULT			"nand0=nand"
#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(xloader),"\
					"1920k(uboot),128k(uboot-env),"\
					"10m(boot),-(rootfs)"
#else
#define MTDPARTS_DEFAULT
#endif

/* Environment information */
#define CONFIG_BOOTDELAY		1

#define CONFIG_EXTRA_ENV_SETTINGS \
	"usbtty=cdc_acm\0" \
	"loadaddr=0x82000000\0" \
	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
		"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \

#define CONFIG_BOOTCOMMAND \
	"if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
			"ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
		"source ${loadaddr}; " \
	"fi; " \
	"ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"

#define CONFIG_AUTO_COMPLETE	1
/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP		/* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
#define CONFIG_SYS_PROMPT		"Pandora # "
#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command */
						/* args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
								/* address */

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
#define CONFIG_SYS_HZ			1000

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1

#define CONFIG_SYS_TEXT_BASE		0x80008000
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

/* **** PISMO SUPPORT *** */

/* Configure the PISMO */
#define PISMO1_NAND_SIZE		GPMC_SIZE_128M
#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M

#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */

#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define CONFIG_ENV_IS_IN_NAND		1
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

#define CONFIG_SYS_CACHELINE_SIZE	64

#endif				/* __CONFIG_H */
Commit	Line	Data
2be2c6cc	1	/*
73225245 GI	2	* (C) Copyright 2008-2010
73225245 GI	3	* Gražvydas Ignotas <notasas@gmail.com>
2be2c6cc DB	4	*
	5	* Configuration settings for the OMAP3 Pandora.
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License as
	9	* published by the Free Software Foundation; either version 2 of
	10	* the License, or (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	20	* MA 02111-1307 USA
	21	*/
	22
	23	#ifndef __CONFIG_H
	24	#define __CONFIG_H
2be2c6cc DB	25
	26	/*
	27	* High Level Configuration Options
	28	*/
2be2c6cc DB	29	#define CONFIG_OMAP 1 /* in a TI OMAP core */
2be2c6cc DB	30	#define CONFIG_OMAP34XX 1 /* which is a 34XX */
2be2c6cc	31	#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
308252ad	32	#define CONFIG_OMAP_GPIO
2be2c6cc	33
cae377b5 VH	34	#define CONFIG_SDRC /* The chip has SDRC controller */
cae377b5 VH	35
2be2c6cc DB	36	#include <asm/arch/cpu.h> /* get chip and board defs */
	37	#include <asm/arch/omap3.h>
	38
6a6b62e3 SP	39	/*
	40	* Display CPU and Board information
	41	*/
	42	#define CONFIG_DISPLAY_CPUINFO 1
	43	#define CONFIG_DISPLAY_BOARDINFO 1
	44
2be2c6cc DB	45	/* Clock Defines */
	46	#define V_OSCK 26000000 /* Clock output from T2 */
	47	#define V_SCLK (V_OSCK >> 1)
	48
2be2c6cc DB	49	#define CONFIG_MISC_INIT_R
	50
	51	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	52	#define CONFIG_SETUP_MEMORY_TAGS 1
	53	#define CONFIG_INITRD_TAG 1
	54	#define CONFIG_REVISION_TAG 1
	55
2fa8ca98 GL	56	#define CONFIG_OF_LIBFDT 1
2fa8ca98 GL	57
2be2c6cc DB	58	/*
	59	* Size of malloc() pool
	60	*/
9c44ddcc	61	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
73225245	62	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
2be2c6cc DB	63
	64	/*
	65	* Hardware drivers
	66	*/
	67
73225245 GI	68	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	69	#define CONFIG_SYS_DEVICE_NULLDEV 1
	70
	71	/* USB */
	72	#define CONFIG_MUSB_UDC 1
	73	#define CONFIG_USB_OMAP3 1
	74	#define CONFIG_TWL4030_USB 1
	75
	76	/* USB device configuration */
	77	#define CONFIG_USB_DEVICE 1
	78	#define CONFIG_USB_TTY 1
	79
2be2c6cc DB	80	/*
	81	* NS16550 Configuration
	82	*/
	83	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
	84
	85	#define CONFIG_SYS_NS16550
	86	#define CONFIG_SYS_NS16550_SERIAL
	87	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	88	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	89
	90	/*
	91	* select serial console configuration
	92	*/
	93	#define CONFIG_CONS_INDEX 3
	94	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
	95	#define CONFIG_SERIAL3 3
	96
	97	/* allow to overwrite serial and ethaddr */
	98	#define CONFIG_ENV_OVERWRITE
	99	#define CONFIG_BAUDRATE 115200
	100	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
	101	115200}
86c5c544	102	#define CONFIG_GENERIC_MMC 1
2be2c6cc	103	#define CONFIG_MMC 1
86c5c544	104	#define CONFIG_OMAP_HSMMC 1
2be2c6cc DB	105	#define CONFIG_DOS_PARTITION 1
	106
	107	/* commands to include */
	108	#include <config_cmd_default.h>
	109
	110	#define CONFIG_CMD_EXT2 /* EXT2 Support */
	111	#define CONFIG_CMD_FAT /* FAT support */
2be2c6cc DB	112
	113	#define CONFIG_CMD_I2C /* I2C serial bus support */
	114	#define CONFIG_CMD_MMC /* MMC support */
	115	#define CONFIG_CMD_NAND /* NAND support */
73225245	116	#define CONFIG_CMD_CACHE /* Cache control */
2be2c6cc DB	117
	118	#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
	119	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
	120	#undef CONFIG_CMD_IMI /* iminfo */
	121	#undef CONFIG_CMD_IMLS /* List all found images */
	122	#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
	123	#undef CONFIG_CMD_NFS /* NFS support */
	124
	125	#define CONFIG_SYS_NO_FLASH
0297ec7e	126	#define CONFIG_HARD_I2C 1
2be2c6cc DB	127	#define CONFIG_SYS_I2C_SPEED 100000
2be2c6cc DB	128	#define CONFIG_SYS_I2C_SLAVE 1
2be2c6cc DB	129	#define CONFIG_DRIVER_OMAP34XX_I2C 1
2be2c6cc DB	130
2c155130 TR	131	/*
	132	* TWL4030
	133	*/
	134	#define CONFIG_TWL4030_POWER 1
	135	#define CONFIG_TWL4030_LED 1
	136
2be2c6cc DB	137	/*
	138	* Board NAND Info.
	139	*/
	140	#define CONFIG_NAND_OMAP_GPMC
	141	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	142	/* to access nand */
	143	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
	144	/* to access nand */
	145	/* at CS0 */
	146	#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
	147
	148	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
	149	/* devices */
73225245 GI	150
	151	#ifdef CONFIG_CMD_NAND
	152	#define CONFIG_CMD_MTDPARTS
	153	#define CONFIG_MTD_PARTITIONS
	154	#define CONFIG_MTD_DEVICE
	155	#define CONFIG_CMD_UBI
	156	#define CONFIG_CMD_UBIFS
	157	#define CONFIG_RBTREE
	158	#define CONFIG_LZO
	159
	160	#define MTDIDS_DEFAULT "nand0=nand"
	161	#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
	162	"1920k(uboot),128k(uboot-env),"\
	163	"10m(boot),-(rootfs)"
	164	#else
	165	#define MTDPARTS_DEFAULT
	166	#endif
2be2c6cc DB	167
	168	/* Environment information */
	169	#define CONFIG_BOOTDELAY 1
	170
	171	#define CONFIG_EXTRA_ENV_SETTINGS \
73225245	172	"usbtty=cdc_acm\0" \
2be2c6cc	173	"loadaddr=0x82000000\0" \
73225245	174	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
9baa37b1	175	"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
73225245	176	"mtdparts=" MTDPARTS_DEFAULT "\0" \
2be2c6cc DB	177
2be2c6cc DB	178	#define CONFIG_BOOTCOMMAND \
86c5c544	179	"if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr \|\| " \
73225245 GI	180	"ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
	181	"source ${loadaddr}; " \
	182	"fi; " \
	183	"ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
2be2c6cc DB	184
	185	#define CONFIG_AUTO_COMPLETE 1
	186	/*
	187	* Miscellaneous configurable options
	188	*/
2be2c6cc DB	189	#define CONFIG_SYS_LONGHELP /* undef to save memory */
2be2c6cc DB	190	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
1270ec13	191	#define CONFIG_SYS_PROMPT "Pandora # "
f62b1257	192	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
2be2c6cc DB	193	/* Print Buffer Size */
	194	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	195	sizeof(CONFIG_SYS_PROMPT) + 16)
	196	#define CONFIG_SYS_MAXARGS 16 /* max number of command */
	197	/* args */
	198	/* Boot Argument Buffer Size */
	199	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	200	/* memtest works on */
	201	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	202	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	203	0x01F00000) /* 31MB */
	204
2be2c6cc DB	205	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
	206	/* address */
	207
	208	/*
d3a513c2 MP	209	* OMAP3 has 12 GP timers, they can be driven by the system clock
	210	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	211	* This rate is divided by a local divisor.
2be2c6cc	212	*/
d3a513c2 MP	213	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
	214	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
	215	#define CONFIG_SYS_HZ 1000
2be2c6cc	216
2be2c6cc DB	217	/*-----------------------------------------------------------------------
	218	* Physical Memory Map
	219	*/
	220	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
	221	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
2be2c6cc DB	222	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
2be2c6cc DB	223
23df4f69 GI	224	#define CONFIG_SYS_TEXT_BASE 0x80008000
	225	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	226	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	227	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	228	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	229	CONFIG_SYS_INIT_RAM_SIZE - \
	230	GENERATED_GBL_DATA_SIZE)
	231
2be2c6cc DB	232	/*-----------------------------------------------------------------------
	233	* FLASH and environment organization
	234	*/
	235
	236	/* ** PISMO SUPPORT * */
	237
	238	/* Configure the PISMO */
	239	#define PISMO1_NAND_SIZE GPMC_SIZE_128M
	240	#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
	241
9c44ddcc	242	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
2be2c6cc	243
6cbec7b3 LC	244	#if defined(CONFIG_CMD_NAND)
	245	#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
	246	#endif
2be2c6cc DB	247
	248	/* Monitor at start of flash */
	249	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
2be2c6cc DB	250
2be2c6cc DB	251	#define CONFIG_ENV_IS_IN_NAND 1
73225245	252	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
2be2c6cc	253
6cbec7b3 LC	254	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	255	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
2be2c6cc DB	256	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
2be2c6cc DB	257
8e40852f A	258	#define CONFIG_SYS_CACHELINE_SIZE 64
8e40852f A	259
2be2c6cc	260	#endif /* __CONFIG_H */