[people/ms/u-boot.git] / include / configs / omap3_zoom1.h

/*
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 * Nishanth Menon <nm@ti.com>
 *
 * Configuration settings for the TI OMAP3430 Zoom MDK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_OMAP3_ZOOM1	1	/* working with Zoom MDK Rev1 */

#define CONFIG_NAND
#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
#include <asm/arch/cpu.h>		/* get chip and board defs */
#include <asm/arch/omap.h>
#include <configs/ti_omap3_common.h>

/* Remove SPL boot option - we do not support that on LDP yet */
#undef CONFIG_SPL_FRAMEWORK
#undef CONFIG_SPL_OS_BOOT

/* Generic NAND definition conflicts with debug_base */
#undef CONFIG_SYS_NAND_BASE

#define CONFIG_MISC_INIT_R

#define CONFIG_REVISION_TAG		1

#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */

/*
 * Hardware drivers
 */

/* USB */
#define CONFIG_USB_MUSB_UDC			1
#define CONFIG_USB_OMAP3		1
#define CONFIG_TWL4030_USB		1

/* USB device configuration */
#define CONFIG_USB_DEVICE		1
#define CONFIG_USB_TTY			1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
/* Change these to suit your needs */
#define CONFIG_USBD_VENDORID		0x0451
#define CONFIG_USBD_PRODUCTID		0x5678
#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
#define CONFIG_USBD_PRODUCT_NAME	"Zoom1"

#define MTDIDS_DEFAULT			"nand0=nand"
#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
					"1920k(u-boot),128k(u-boot-env),"\
					"4m(kernel),-(fs)"

#if defined(CONFIG_CMD_NAND)
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x240000
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x280000
#define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
#endif
#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
#endif

#undef CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_SYS_I2C_OMAP34XX

/*
 * TWL4030
 */
#define CONFIG_TWL4030_LED		1

/*
 * Board NAND Info.
 */
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
							/* to access nand at */
							/* CS0 */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT

/* Environment information */

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x82000000\0" \
	"fdtaddr=0x80f80000\0" \
	"bootfile=uImage\0" \
	"fdtfile=omap3-ldp.dtb\0" \
	"bootdir=/\0" \
	"bootpart=0:1\0" \
	"usbtty=cdc_acm\0" \
	"console=ttyO2,115200n8\0" \
	"mmcdev=0\0" \
	"videomode=1024x768@60,vxres=1024,vyres=768\0" \
	"videospec=omapfb:vram:2M,vram:4M\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"video=${videospec},mode:${videomode} " \
		"root=/dev/mmcblk0p2 rw " \
		"rootfstype=ext3 rootwait\0" \
	"nandargs=setenv bootargs console=${console} " \
		"video=${videospec},mode:${videomode} " \
		"root=/dev/mtdblock4 rw " \
		"rootfstype=jffs2\0" \
	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source ${loadaddr}\0" \
	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootm ${loadaddr}\0" \
	"mmczboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} 280000 400000; " \
		"bootm ${loadaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"else " \
			"if run loadimage; then " \
				"run mmcboot; " \
			"else if run loadzimage; then " \
				"run mmczboot; " \
			"else run nandboot; " \
			"fi; fi;" \
		"fi; " \
	"else run nandboot; fi"

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1)	/* memtest */
#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_2 + \
					0x01F00000) /* 31MB */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

/* **** PISMO SUPPORT *** */
#if defined(CONFIG_CMD_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP

#define CONFIG_ENV_IS_IN_NAND		1
#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET

#ifdef CONFIG_CMD_NET
/* Ethernet (LAN9211 from SMSC9118 family) */
#define CONFIG_SMC911X
#define CONFIG_SMC911X_32_BIT
#define CONFIG_SMC911X_BASE		DEBUG_BASE

#endif

#endif				/* __CONFIG_H */
Commit	Line	Data
7379f45a DB	1	/*
	2	* (C) Copyright 2006-2008
	3	* Texas Instruments.
	4	* Richard Woodruff <r-woodruff2@ti.com>
	5	* Syed Mohammed Khasim <x0khasim@ti.com>
	6	* Nishanth Menon <nm@ti.com>
	7	*
	8	* Configuration settings for the TI OMAP3430 Zoom MDK board.
	9	*
3765b3e7	10	* SPDX-License-Identifier: GPL-2.0+
7379f45a DB	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
7379f45a DB	15
	16	/*
	17	* High Level Configuration Options
	18	*/
7379f45a DB	19	#define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
7379f45a DB	20
161d2d5e NM	21	#define CONFIG_NAND
161d2d5e NM	22	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
7379f45a	23	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	24	#include <asm/arch/omap.h>
161d2d5e NM	25	#include <configs/ti_omap3_common.h>
	26
	27	/* Remove SPL boot option - we do not support that on LDP yet */
161d2d5e NM	28	#undef CONFIG_SPL_FRAMEWORK
	29	#undef CONFIG_SPL_OS_BOOT
	30
	31	/* Generic NAND definition conflicts with debug_base */
	32	#undef CONFIG_SYS_NAND_BASE
7379f45a	33
7379f45a DB	34	#define CONFIG_MISC_INIT_R
7379f45a DB	35
7379f45a DB	36	#define CONFIG_REVISION_TAG 1
7379f45a DB	37
9c44ddcc	38	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
7379f45a DB	39
	40	/*
	41	* Hardware drivers
	42	*/
	43
05be5a60	44	/* USB */
95de1e2f	45	#define CONFIG_USB_MUSB_UDC 1
05be5a60 TR	46	#define CONFIG_USB_OMAP3 1
	47	#define CONFIG_TWL4030_USB 1
	48
	49	/* USB device configuration */
	50	#define CONFIG_USB_DEVICE 1
	51	#define CONFIG_USB_TTY 1
	52	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	53	/* Change these to suit your needs */
	54	#define CONFIG_USBD_VENDORID 0x0451
	55	#define CONFIG_USBD_PRODUCTID 0x5678
	56	#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
	57	#define CONFIG_USBD_PRODUCT_NAME "Zoom1"
	58
4e8183b7 NM	59	#define MTDIDS_DEFAULT "nand0=nand"
	60	#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
	61	"1920k(u-boot),128k(u-boot-env),"\
	62	"4m(kernel),-(fs)"
7379f45a	63
161d2d5e	64	#if defined(CONFIG_CMD_NAND)
434f2cfc	65	/* NAND: SPL falcon mode configs */
	66	#ifdef CONFIG_SPL_OS_BOOT
	67	#define CONFIG_CMD_SPL_NAND_OFS 0x240000
	68	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
	69	#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
	70	#endif
e7deec1b	71	#define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
161d2d5e	72	#endif
7379f45a	73
161d2d5e	74	#undef CONFIG_SYS_I2C_OMAP24XX
6789e84e	75	#define CONFIG_SYS_I2C_OMAP34XX
7379f45a	76
cd782635 TR	77	/*
	78	* TWL4030
	79	*/
2c155130	80	#define CONFIG_TWL4030_LED 1
cd782635	81
7379f45a DB	82	/*
	83	* Board NAND Info.
	84	*/
7379f45a DB	85	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	86	/* to access nand */
	87	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
	88	/* to access nand at */
	89	/* CS0 */
55f1b39f	90	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
7379f45a DB	91
7379f45a DB	92	/* Environment information */
7379f45a DB	93
	94	#define CONFIG_EXTRA_ENV_SETTINGS \
	95	"loadaddr=0x82000000\0" \
c2e7c7b2	96	"fdtaddr=0x80f80000\0" \
4e8183b7	97	"bootfile=uImage\0" \
c2e7c7b2	98	"fdtfile=omap3-ldp.dtb\0" \
4e8183b7 NM	99	"bootdir=/\0" \
4e8183b7 NM	100	"bootpart=0:1\0" \
05be5a60	101	"usbtty=cdc_acm\0" \
ea467c73	102	"console=ttyO2,115200n8\0" \
d6906cb8	103	"mmcdev=0\0" \
7379f45a DB	104	"videomode=1024x768@60,vxres=1024,vyres=768\0" \
	105	"videospec=omapfb:vram:2M,vram:4M\0" \
	106	"mmcargs=setenv bootargs console=${console} " \
	107	"video=${videospec},mode:${videomode} " \
	108	"root=/dev/mmcblk0p2 rw " \
	109	"rootfstype=ext3 rootwait\0" \
	110	"nandargs=setenv bootargs console=${console} " \
	111	"video=${videospec},mode:${videomode} " \
	112	"root=/dev/mtdblock4 rw " \
	113	"rootfstype=jffs2\0" \
d6906cb8	114	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
7379f45a	115	"bootscript=echo Running bootscript from mmc ...; " \
74de7aef	116	"source ${loadaddr}\0" \
4e8183b7	117	"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
c2e7c7b2 NM	118	"loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
c2e7c7b2 NM	119	"loadzimage=setenv bootfile zImage; if run loadimage; then run loadfdt;fi\0"\
7379f45a DB	120	"mmcboot=echo Booting from mmc ...; " \
	121	"run mmcargs; " \
	122	"bootm ${loadaddr}\0" \
c2e7c7b2 NM	123	"mmczboot=echo Booting from mmc ...; " \
	124	"run mmcargs; " \
	125	"bootz ${loadaddr} - ${fdtaddr}\0" \
7379f45a DB	126	"nandboot=echo Booting from nand ...; " \
	127	"run nandargs; " \
	128	"nand read ${loadaddr} 280000 400000; " \
	129	"bootm ${loadaddr}\0" \
	130
	131	#define CONFIG_BOOTCOMMAND \
66968110	132	"mmc dev ${mmcdev}; if mmc rescan; then " \
7379f45a DB	133	"if run loadbootscript; then " \
	134	"run bootscript; " \
	135	"else " \
4e8183b7	136	"if run loadimage; then " \
7379f45a	137	"run mmcboot; " \
c2e7c7b2 NM	138	"else if run loadzimage; then " \
c2e7c7b2 NM	139	"run mmczboot; " \
7379f45a	140	"else run nandboot; " \
c2e7c7b2	141	"fi; fi;" \
7379f45a DB	142	"fi; " \
	143	"else run nandboot; fi"
	144
7379f45a DB	145	/*
	146	* Miscellaneous configurable options
	147	*/
161d2d5e NM	148	#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1) /* memtest */
161d2d5e NM	149	#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_2 + \
7379f45a DB	150	0x01F00000) /* 31MB */
7379f45a DB	151
7379f45a DB	152	/*-----------------------------------------------------------------------
	153	* FLASH and environment organization
	154	*/
	155
	156	/* ** PISMO SUPPORT * */
6cbec7b3	157	#if defined(CONFIG_CMD_NAND)
222a3113	158	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	159	#endif
7379f45a DB	160
	161	/* Monitor at start of flash */
	162	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	163	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	164
	165	#define CONFIG_ENV_IS_IN_NAND 1
	166	#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
	167	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
	168
6cbec7b3 LC	169	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
6cbec7b3 LC	170	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
7379f45a DB	171	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
7379f45a DB	172
9d70e772 NM	173	#ifdef CONFIG_CMD_NET
	174	/* Ethernet (LAN9211 from SMSC9118 family) */
	175	#define CONFIG_SMC911X
	176	#define CONFIG_SMC911X_32_BIT
	177	#define CONFIG_SMC911X_BASE DEBUG_BASE
	178
	179	#endif
	180
7379f45a	181	#endif /* __CONFIG_H */