[people/ms/u-boot.git] / include / configs / origen.h

/*
 * Copyright (C) 2011 Samsung Electronics
 *
 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ORIGEN_H
#define __CONFIG_ORIGEN_H

#include <configs/exynos4-common.h>

/* High Level Configuration Options */
#define CONFIG_EXYNOS4210		1	/* which is a EXYNOS4210 SoC */
#define CONFIG_ORIGEN			1	/* working with ORIGEN*/

#define CONFIG_SYS_DCACHE_OFF		1

/* ORIGEN has 4 bank of DRAM */
#define CONFIG_NR_DRAM_BANKS		4
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
#define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
#define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)

#define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN

/* select serial console configuration */
#define CONFIG_SERIAL2

/* Console configuration */
#define CONFIG_DEFAULT_CONSOLE		"console=ttySAC1,115200n8\0"

#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */

#define CONFIG_SYS_MONITOR_BASE	0x00000000

/* Power Down Modes */
#define S5P_CHECK_SLEEP			0x00000BAD
#define S5P_CHECK_DIDLE			0xBAD00000
#define S5P_CHECK_LPA			0xABAD0000

/* MMC SPL */
#define COPY_BL2_FNPTR_ADDR	0x02020030
#define CONFIG_SPL_TEXT_BASE	0x02021410

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x40007000\0" \
	"rdaddr=0x48000000\0" \
	"kerneladdr=0x40007000\0" \
	"ramdiskaddr=0x48000000\0" \
	"console=ttySAC2,115200n8\0" \
	"mmcdev=0\0" \
	"bootenv=uEnv.txt\0" \
	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t $loadaddr $filesize\0" \
        "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
        "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
                "source ${loadaddr}\0"
#define CONFIG_BOOTCOMMAND \
	"if mmc rescan; then " \
		"echo SD/MMC found on device ${mmcdev};" \
		"if run loadbootenv; then " \
			"echo Loaded environment from ${bootenv};" \
			"run importbootenv;" \
		"fi;" \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...;" \
			"run uenvcmd;" \
		"fi;" \
		"if run loadbootscript; then " \
			"run bootscript; " \
		"fi; " \
	"fi;" \
	"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "

#define CONFIG_CLK_1000_400_200

/* MIU (Memory Interleaving Unit) */
#define CONFIG_MIU_2BIT_21_7_INTERLEAVED

#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KB */
#define RESERVE_BLOCK_SIZE		(512)
#define BL1_SIZE			(16 << 10) /*16 K reserved for BL1*/
#define CONFIG_ENV_OFFSET		(RESERVE_BLOCK_SIZE + BL1_SIZE)

#define CONFIG_SPL_MAX_FOOTPRINT	(14 * 1024)

#define CONFIG_SYS_INIT_SP_ADDR		0x02040000

/* U-Boot copy size from boot Media to DRAM.*/
#define COPY_BL2_SIZE		0x80000
#define BL2_START_OFFSET	((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
#define BL2_SIZE_BLOC_COUNT	(COPY_BL2_SIZE/512)

#endif	/* __CONFIG_H */
Commit	Line	Data
b9a1ef21 CK	1	/*
	2	* Copyright (C) 2011 Samsung Electronics
	3	*
393cb361	4	* Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
b9a1ef21	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
b9a1ef21 CK	7	*/
b9a1ef21 CK	8
bf7716d6 PW	9	#ifndef __CONFIG_ORIGEN_H
	10	#define __CONFIG_ORIGEN_H
	11
4c7bb1d2	12	#include <configs/exynos4-common.h>
bf7716d6	13
b9a1ef21	14	/* High Level Configuration Options */
393cb361	15	#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
b9a1ef21 CK	16	#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
b9a1ef21 CK	17
b9a1ef21 CK	18	#define CONFIG_SYS_DCACHE_OFF 1
b9a1ef21 CK	19
bf7716d6 PW	20	/* ORIGEN has 4 bank of DRAM */
bf7716d6 PW	21	#define CONFIG_NR_DRAM_BANKS 4
b9a1ef21	22	#define CONFIG_SYS_SDRAM_BASE 0x40000000
bf7716d6 PW	23	#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
bf7716d6 PW	24	#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
b9a1ef21	25
bf7716d6 PW	26	/* memtest works on */
	27	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	28	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
	29	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
b9a1ef21	30
b9a1ef21 CK	31	#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
b9a1ef21 CK	32
b9a1ef21	33	/* select serial console configuration */
bf7716d6	34	#define CONFIG_SERIAL2
b9a1ef21	35
bf7716d6	36	/* Console configuration */
bf7716d6	37	#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
643be9c0	38
bf7716d6	39	#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
b9a1ef21	40
bf7716d6	41	#define CONFIG_SYS_MONITOR_BASE 0x00000000
b9a1ef21	42
bf7716d6 PW	43	/* Power Down Modes */
	44	#define S5P_CHECK_SLEEP 0x00000BAD
	45	#define S5P_CHECK_DIDLE 0xBAD00000
	46	#define S5P_CHECK_LPA 0xABAD0000
b9a1ef21	47
98a48c5d	48	/* MMC SPL */
98a48c5d	49	#define COPY_BL2_FNPTR_ADDR 0x02020030
8a00061e IS	50	#define CONFIG_SPL_TEXT_BASE 0x02021410
8a00061e IS	51
7741c8b8 GG	52	#define CONFIG_EXTRA_ENV_SETTINGS \
	53	"loadaddr=0x40007000\0" \
	54	"rdaddr=0x48000000\0" \
	55	"kerneladdr=0x40007000\0" \
	56	"ramdiskaddr=0x48000000\0" \
	57	"console=ttySAC2,115200n8\0" \
	58	"mmcdev=0\0" \
	59	"bootenv=uEnv.txt\0" \
	60	"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
	61	"importbootenv=echo Importing environment from mmc ...; " \
	62	"env import -t $loadaddr $filesize\0" \
	63	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
	64	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
	65	"source ${loadaddr}\0"
	66	#define CONFIG_BOOTCOMMAND \
	67	"if mmc rescan; then " \
	68	"echo SD/MMC found on device ${mmcdev};" \
	69	"if run loadbootenv; then " \
	70	"echo Loaded environment from ${bootenv};" \
	71	"run importbootenv;" \
	72	"fi;" \
	73	"if test -n $uenvcmd; then " \
	74	"echo Running uenvcmd ...;" \
	75	"run uenvcmd;" \
	76	"fi;" \
	77	"if run loadbootscript; then " \
	78	"run bootscript; " \
	79	"fi; " \
	80	"fi;" \
	81	"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
b9a1ef21	82
b9a1ef21 CK	83	#define CONFIG_CLK_1000_400_200
	84
	85	/* MIU (Memory Interleaving Unit) */
	86	#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
	87
b9a1ef21 CK	88	#define CONFIG_SYS_MMC_ENV_DEV 0
	89	#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
	90	#define RESERVE_BLOCK_SIZE (512)
	91	#define BL1_SIZE (16 << 10) /16 K reserved for BL1/
	92	#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
b9a1ef21	93
643be9c0 RS	94	#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
	95
	96	#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
98a48c5d	97
a187559e	98	/* U-Boot copy size from boot Media to DRAM.*/
98a48c5d CK	99	#define COPY_BL2_SIZE 0x80000
	100	#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
	101	#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
099e884a	102
b9a1ef21	103	#endif /* __CONFIG_H */