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Commit | Line | Data |
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265817c7 WD |
1 | /* |
2 | * (C) Copyright 2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
265817c7 WD |
6 | */ |
7 | ||
8 | /* | |
9 | * This file contains the configuration parameters for the dbau1x00 board. | |
10 | */ | |
11 | ||
12 | #ifndef __CONFIG_H | |
13 | #define __CONFIG_H | |
14 | ||
265817c7 | 15 | #define CONFIG_PB1X00 1 |
8bde63eb | 16 | #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ |
265817c7 | 17 | |
e8bb0c2b DS |
18 | #define CONFIG_DISPLAY_BOARDINFO |
19 | ||
265817c7 | 20 | #ifdef CONFIG_PB1000 |
8bde63eb | 21 | #define CONFIG_SOC_AU1000 1 |
265817c7 WD |
22 | #else |
23 | #ifdef CONFIG_PB1100 | |
8bde63eb | 24 | #define CONFIG_SOC_AU1100 1 |
265817c7 WD |
25 | #else |
26 | #ifdef CONFIG_PB1500 | |
8bde63eb | 27 | #define CONFIG_SOC_AU1500 1 |
265817c7 WD |
28 | #else |
29 | #error "No valid board set" | |
30 | #endif | |
31 | #endif | |
32 | #endif | |
33 | ||
34 | #define CONFIG_ETHADDR DE:AD:BE:EF:01:01 /* Ethernet address */ | |
35 | ||
36 | #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ | |
37 | ||
38 | #define CONFIG_BAUDRATE 115200 | |
39 | ||
265817c7 WD |
40 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ |
41 | #undef CONFIG_BOOTARGS | |
42 | ||
43 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
fe126d8b WD |
44 | "addmisc=setenv bootargs ${bootargs} " \ |
45 | "console=ttyS0,${baudrate} " \ | |
265817c7 WD |
46 | "panic=1\0" \ |
47 | "bootfile=/vmlinux.img\0" \ | |
fe126d8b | 48 | "load=tftp 80500000 ${u-boot}\0" \ |
265817c7 WD |
49 | "" |
50 | /* Boot from NFS root */ | |
fe126d8b | 51 | #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" |
265817c7 WD |
52 | |
53 | /* | |
54 | * Miscellaneous configurable options | |
55 | */ | |
6d0f6bcf JCPV |
56 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
57 | #define CONFIG_SYS_PROMPT "Pb1x00 # " /* Monitor Command Prompt */ | |
58 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ | |
59 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
60 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ | |
265817c7 | 61 | |
6d0f6bcf | 62 | #define CONFIG_SYS_MALLOC_LEN 128*1024 |
265817c7 | 63 | |
6d0f6bcf | 64 | #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 |
265817c7 | 65 | |
6d0f6bcf | 66 | #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000 |
a55d4817 | 67 | |
6d0f6bcf | 68 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ |
265817c7 | 69 | |
6d0f6bcf | 70 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ |
265817c7 | 71 | |
6d0f6bcf JCPV |
72 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
73 | #undef CONFIG_SYS_MEMTEST_START | |
74 | #define CONFIG_SYS_MEMTEST_START 0x80200000 | |
75 | #define CONFIG_SYS_MEMTEST_END 0x83800000 | |
265817c7 WD |
76 | |
77 | /*----------------------------------------------------------------------- | |
78 | * FLASH and environment organization | |
79 | */ | |
6d0f6bcf JCPV |
80 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ |
81 | #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ | |
265817c7 WD |
82 | |
83 | #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ | |
84 | #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ | |
85 | ||
86 | /* The following #defines are needed to get flash environment right */ | |
14d0a02a | 87 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
6d0f6bcf | 88 | #define CONFIG_SYS_MONITOR_LEN (192 << 10) |
265817c7 | 89 | |
6d0f6bcf | 90 | #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 |
265817c7 WD |
91 | |
92 | /* We boot from this flash, selected with dip switch */ | |
6d0f6bcf | 93 | #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 |
265817c7 WD |
94 | |
95 | /* timeout values are in ticks */ | |
6d0f6bcf JCPV |
96 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
97 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
265817c7 | 98 | |
93f6d725 | 99 | #define CONFIG_ENV_IS_NOWHERE 1 |
265817c7 WD |
100 | |
101 | /* Address and size of Primary Environment Sector */ | |
0e8d1586 JCPV |
102 | #define CONFIG_ENV_ADDR 0xB0030000 |
103 | #define CONFIG_ENV_SIZE 0x10000 | |
265817c7 WD |
104 | |
105 | #define CONFIG_FLASH_16BIT | |
106 | ||
107 | #define CONFIG_NR_DRAM_BANKS 2 | |
108 | ||
265817c7 WD |
109 | |
110 | #define CONFIG_MEMSIZE_IN_BYTES | |
111 | ||
112 | ||
113 | /*---USB -------------------------------------------*/ | |
114 | #if 0 | |
115 | #define CONFIG_USB_OHCI | |
265817c7 WD |
116 | #define CONFIG_USB_STORAGE |
117 | #define CONFIG_DOS_PARTITION | |
265817c7 WD |
118 | #endif |
119 | ||
120 | /*---ATA PCMCIA ------------------------------------*/ | |
121 | #if 0 | |
6d0f6bcf JCPV |
122 | #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ |
123 | #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 | |
265817c7 WD |
124 | #define CONFIG_PCMCIA_SLOT_A |
125 | ||
126 | #define CONFIG_ATAPI 1 | |
127 | #define CONFIG_MAC_PARTITION 1 | |
128 | ||
129 | /* We run CF in "true ide" mode or a harddrive via pcmcia */ | |
130 | #define CONFIG_IDE_PCMCIA 1 | |
131 | ||
132 | /* We only support one slot for now */ | |
6d0f6bcf JCPV |
133 | #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ |
134 | #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ | |
265817c7 WD |
135 | |
136 | #undef CONFIG_IDE_LED /* LED for ide not supported */ | |
137 | #undef CONFIG_IDE_RESET /* reset for ide not supported */ | |
138 | ||
6d0f6bcf | 139 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 |
265817c7 | 140 | |
6d0f6bcf | 141 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR |
265817c7 WD |
142 | |
143 | /* Offset for data I/O */ | |
6d0f6bcf | 144 | #define CONFIG_SYS_ATA_DATA_OFFSET 8 |
265817c7 WD |
145 | |
146 | /* Offset for normal register accesses */ | |
6d0f6bcf | 147 | #define CONFIG_SYS_ATA_REG_OFFSET 0 |
265817c7 WD |
148 | |
149 | /* Offset for alternate registers */ | |
6d0f6bcf | 150 | #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 |
265817c7 WD |
151 | |
152 | #endif | |
153 | /*----------------------------------------------------------------------- | |
154 | * Cache Configuration | |
155 | */ | |
6d0f6bcf JCPV |
156 | #define CONFIG_SYS_DCACHE_SIZE 16384 |
157 | #define CONFIG_SYS_ICACHE_SIZE 16384 | |
158 | #define CONFIG_SYS_CACHELINE_SIZE 32 | |
265817c7 | 159 | |
26a34560 | 160 | |
079a136c JL |
161 | /* |
162 | * BOOTP options | |
163 | */ | |
164 | #define CONFIG_BOOTP_BOOTFILESIZE | |
165 | #define CONFIG_BOOTP_BOOTPATH | |
166 | #define CONFIG_BOOTP_GATEWAY | |
167 | #define CONFIG_BOOTP_HOSTNAME | |
168 | ||
169 | ||
26a34560 JL |
170 | /* |
171 | * Command line configuration. | |
172 | */ | |
173 | #include <config_cmd_default.h> | |
174 | ||
175 | #define CONFIG_CMD_DHCP | |
176 | #define CONFIG_CMD_ELF | |
177 | #define CONFIG_CMD_MII | |
178 | #define CONFIG_CMD_PING | |
179 | ||
bdab39d3 | 180 | #undef CONFIG_CMD_SAVEENV |
26a34560 JL |
181 | #undef CONFIG_CMD_FAT |
182 | #undef CONFIG_CMD_FLASH | |
183 | #undef CONFIG_CMD_FPGA | |
184 | #undef CONFIG_CMD_IDE | |
185 | #undef CONFIG_CMD_LOADS | |
186 | #undef CONFIG_CMD_RUN | |
187 | #undef CONFIG_CMD_LOADB | |
188 | #undef CONFIG_CMD_ELF | |
189 | #undef CONFIG_CMD_BDI | |
190 | #undef CONFIG_CMD_BEDBUG | |
265817c7 WD |
191 | |
192 | #endif /* __CONFIG_H */ |