Move CONFIG_OF_LIBFDT to Kconfig
[people/ms/u-boot.git] / include / configs / pcm052.h
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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the phytec PCM-052 SoM.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
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12#define CONFIG_SYS_CACHELINE_SIZE 32
13
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14#include <asm/arch/imx-regs.h>
15
16#define CONFIG_VF610
17
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18#define CONFIG_DISPLAY_CPUINFO
19#define CONFIG_DISPLAY_BOARDINFO
20#define CONFIG_SYS_THUMB_BUILD
21
22#define CONFIG_SKIP_LOWLEVEL_INIT
23
24/* Enable passing of ATAGs */
25#define CONFIG_CMDLINE_TAG
26
27/* Size of malloc() pool */
28#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
29
30#define CONFIG_BOARD_EARLY_INIT_F
31
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32/* Allow to overwrite serial and ethaddr */
33#define CONFIG_ENV_OVERWRITE
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34#define CONFIG_BAUDRATE 115200
35
36#undef CONFIG_CMD_IMLS
37
38/* NAND support */
39#define CONFIG_CMD_NAND
40#define CONFIG_CMD_NAND_TRIMFFS
41#define CONFIG_SYS_NAND_ONFI_DETECTION
42
43#ifdef CONFIG_CMD_NAND
44#define CONFIG_USE_ARCH_MEMCPY
45#define CONFIG_SYS_MAX_NAND_DEVICE 1
46#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
47
48#define CONFIG_JFFS2_NAND
49
50/* UBI */
51#define CONFIG_CMD_UBI
52#define CONFIG_CMD_UBIFS
53#define CONFIG_RBTREE
54#define CONFIG_LZO
55
56/* Dynamic MTD partition support */
57#define CONFIG_CMD_MTDPARTS
58#define CONFIG_MTD_PARTITIONS
59#define CONFIG_MTD_DEVICE
040ef8f5 60#define MTDIDS_DEFAULT "nand0=NAND"
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61#define MTDPARTS_DEFAULT "mtdparts=NAND:256k(spare)"\
62 ",384k(bootloader)"\
63 ",128k(env1)"\
64 ",128k(env2)"\
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65 ",128k(dtb)"\
66 ",6144k(kernel)"\
67 ",65536k(ramdisk)"\
68 ",450944k(root)"
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69#endif
70
71#define CONFIG_MMC
72#define CONFIG_FSL_ESDHC
73#define CONFIG_SYS_FSL_ESDHC_ADDR 0
74#define CONFIG_SYS_FSL_ESDHC_NUM 1
75
76/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
77#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
78#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
79#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
80
81#define CONFIG_CMD_MMC
82#define CONFIG_GENERIC_MMC
83#define CONFIG_CMD_FAT
84#define CONFIG_DOS_PARTITION
85
86#define CONFIG_CMD_PING
87#define CONFIG_CMD_DHCP
88#define CONFIG_CMD_MII
89#define CONFIG_FEC_MXC
90#define CONFIG_MII
91#define IMX_FEC_BASE ENET_BASE_ADDR
92#define CONFIG_FEC_XCV_TYPE RMII
93#define CONFIG_FEC_MXC_PHYADDR 0
94#define CONFIG_PHYLIB
95#define CONFIG_PHY_MICREL
96
97/* QSPI Configs*/
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98
99#ifdef CONFIG_FSL_QSPI
100#define CONFIG_CMD_SF
101#define CONFIG_SPI_FLASH
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102#define FSL_QSPI_FLASH_SIZE (1 << 24)
103#define FSL_QSPI_FLASH_NUM 2
104#define CONFIG_SYS_FSL_QSPI_LE
105#endif
106
107/* I2C Configs */
108#define CONFIG_CMD_I2C
109#define CONFIG_SYS_I2C
110#define CONFIG_SYS_I2C_MXC_I2C3
111#define CONFIG_SYS_I2C_MXC
112
113/* RTC (actually an RV-4162 but M41T62-compatible) */
114#define CONFIG_CMD_DATE
115#define CONFIG_RTC_M41T62
116#define CONFIG_SYS_I2C_RTC_ADDR 0x68
117#define CONFIG_SYS_RTC_BUS_NUM 2
118
119/* EEPROM (24FC256) */
120#define CONFIG_CMD_EEPROM
121#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
122#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
123#define CONFIG_SYS_I2C_EEPROM_BUS 2
124
125#define CONFIG_BOOTDELAY 3
126
127#define CONFIG_LOADADDR 0x82000000
128
129/* We boot from the gfxRAM area of the OCRAM. */
130#define CONFIG_SYS_TEXT_BASE 0x3f408000
131#define CONFIG_BOARD_SIZE_LIMIT 524288
132
133#define CONFIG_BOOTCOMMAND "run bootcmd_sd"
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134#define CONFIG_EXTRA_ENV_SETTINGS \
135 "fdt_high=0xffffffff\0" \
136 "initrd_high=0xffffffff\0" \
137 "blimg_file=u-boot.imx\0" \
138 "blsec_addr=0x81000000\0" \
139 "blimg_addr=0x81000400\0" \
140 "kernel_file=zImage\0" \
141 "kernel_addr=0x82000000\0" \
142 "fdt_file=vf610-pcm052.dtb\0" \
143 "fdt_addr=0x81000000\0" \
144 "ram_file=uRamdisk\0" \
145 "ram_addr=0x83000000\0" \
146 "filesys=rootfs.ubifs\0" \
147 "sys_addr=0x81000000\0" \
148 "tftploc=/path/to/tftp/directory/\0" \
149 "nfs_root=/path/to/nfs/root\0" \
150 "tftptimeout=1000\0" \
151 "tftptimeoutcountmax=1000000\0" \
152 "mtdparts=" MTDPARTS_DEFAULT "\0" \
153 "bootargs_base=setenv bootargs rw mem=256M " \
154 "console=ttyLP1,115200n8\0" \
155 "bootargs_sd=setenv bootargs ${bootargs} " \
156 "root=/dev/mmcblk0p2 rootwait\0" \
931a1d2a 157 "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
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158 "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
159 "bootargs_nand=setenv bootargs ${bootargs} " \
160 "ubi.mtd=6 rootfstype=ubifs root=ubi0:rootfs\0" \
161 "bootargs_ram=setenv bootargs ${bootargs} " \
162 "root=/dev/ram rw initrd=${ram_addr}\0" \
163 "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
164 "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; " \
165 "fatload mmc 0:1 ${kernel_addr} ${kernel_file}; " \
166 "fatload mmc 0:1 ${fdt_addr} ${fdt_file}; " \
167 "bootz ${kernel_addr} - ${fdt_addr}\0" \
168 "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
169 "tftpboot ${kernel_addr} ${tftpdir}${kernel_file}; " \
170 "tftpboot ${fdt_addr} ${tftpdir}${fdt_file}; " \
171 "bootz ${kernel_addr} - ${fdt_addr}\0" \
172 "bootcmd_nand=run bootargs_base bootargs_nand bootargs_mtd; " \
173 "nand read ${fdt_addr} dtb; " \
174 "nand read ${kernel_addr} kernel; " \
175 "bootz ${kernel_addr} - ${fdt_addr}\0" \
176 "bootcmd_ram=run bootargs_base bootargs_ram bootargs_mtd; " \
177 "nand read ${fdt_addr} dtb; " \
178 "nand read ${kernel_addr} kernel; " \
179 "nand read ${ram_addr} ramdisk; " \
180 "bootz ${kernel_addr} ${ram_addr} ${fdt_addr}\0" \
181 "update_bootloader_from_tftp=mtdparts default; " \
182 "nand read ${blsec_addr} bootloader; " \
183 "mw.b ${blimg_addr} 0xff 0x5FC00; " \
184 "if tftp ${blimg_addr} ${tftpdir}${blimg_file}; then " \
185 "nand erase.part bootloader; " \
186 "nand write ${blsec_addr} bootloader ${filesize}; fi\0" \
187 "update_kernel_from_sd=if fatload mmc 0:2 ${kernel_addr} " \
188 "${kernel_file}; " \
189 "then mtdparts default; " \
190 "nand erase.part kernel; " \
191 "nand write ${kernel_addr} kernel ${filesize}; " \
192 "if fatload mmc 0:2 ${fdt_addr} ${fdt_file}; then " \
193 "nand erase.part dtb; " \
194 "nand write ${fdt_addr} dtb ${filesize}; fi\0" \
195 "update_kernel_from_tftp=if tftp ${fdt_addr} ${tftpdir}${fdt_file}; " \
196 "then setenv fdtsize ${filesize}; " \
197 "if tftp ${kernel_addr} ${tftpdir}${kernel_file}; then " \
198 "mtdparts default; " \
199 "nand erase.part dtb; " \
200 "nand write ${fdt_addr} dtb ${fdtsize}; " \
201 "nand erase.part kernel; " \
202 "nand write ${kernel_addr} kernel ${filesize}; fi; fi\0" \
203 "update_rootfs_from_tftp=if tftp ${sys_addr} ${tftpdir}${filesys}; " \
204 "then mtdparts default; " \
205 "nand erase.part root; " \
206 "ubi part root; " \
207 "ubi create rootfs; " \
208 "ubi write ${sys_addr} rootfs ${filesize}; fi\0" \
209 "update_ramdisk_from_tftp=if tftp ${ram_addr} ${tftpdir}${ram_file}; " \
210 "then mtdparts default; " \
211 "nand erase.part ramdisk; " \
212 "nand write ${ram_addr} ramdisk ${filesize}; fi\0"
931a1d2a 213
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214/* Miscellaneous configurable options */
215#define CONFIG_SYS_LONGHELP /* undef to save memory */
216#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
217#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
218#define CONFIG_AUTO_COMPLETE
219#define CONFIG_CMDLINE_EDITING
220#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
221#define CONFIG_SYS_PBSIZE \
222 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
223#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
224#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
225
226#define CONFIG_CMD_MEMTEST
227#define CONFIG_SYS_MEMTEST_START 0x80010000
228#define CONFIG_SYS_MEMTEST_END 0x87C00000
229
230#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
231
232/*
233 * Stack sizes
234 * The stack sizes are set up in start.S using the settings below
235 */
236#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
237
238/* Physical memory map */
239#define CONFIG_NR_DRAM_BANKS 1
240#define PHYS_SDRAM (0x80000000)
241#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
242
243#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
244#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
245#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
246
247#define CONFIG_SYS_INIT_SP_OFFSET \
248 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
249#define CONFIG_SYS_INIT_SP_ADDR \
250 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
251
252/* FLASH and environment organization */
253#define CONFIG_SYS_NO_FLASH
254
255#ifdef CONFIG_ENV_IS_IN_MMC
256#define CONFIG_ENV_SIZE (8 * 1024)
257
258#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
259#define CONFIG_SYS_MMC_ENV_DEV 0
260#endif
261
262#ifdef CONFIG_ENV_IS_IN_NAND
263#define CONFIG_ENV_SECT_SIZE (128 * 1024)
264#define CONFIG_ENV_SIZE (8 * 1024)
040ef8f5 265#define CONFIG_ENV_OFFSET 0xA0000
931a1d2a 266#define CONFIG_ENV_SIZE_REDUND (8 * 1024)
040ef8f5 267#define CONFIG_ENV_OFFSET_REDUND 0xC0000
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268#endif
269
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270#define CONFIG_CMD_BOOTZ
271
272#endif