]>
Commit | Line | Data |
---|---|---|
1541d7a6 VM |
1 | /* |
2 | * Copyright (C) 2017 NXP Semiconductors | |
3 | * | |
4 | * Configuration settings for the i.MX7D Pico board. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __PICO_IMX7D_CONFIG_H | |
10 | #define __PICO_IMX7D_CONFIG_H | |
11 | ||
12 | #include "mx7_common.h" | |
13 | ||
14 | #define PHYS_SDRAM_SIZE SZ_1G | |
15 | ||
16 | /* Size of malloc() pool */ | |
17 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) | |
18 | ||
19 | #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR | |
20 | ||
21 | /* Network */ | |
22 | #define CONFIG_FEC_MXC | |
23 | #define CONFIG_MII | |
24 | #define CONFIG_FEC_XCV_TYPE RGMII | |
25 | #define CONFIG_ETHPRIME "FEC" | |
26 | #define CONFIG_FEC_MXC_PHYADDR 1 | |
27 | ||
1541d7a6 VM |
28 | #define CONFIG_PHY_ATHEROS |
29 | ||
30 | /* ENET1 */ | |
31 | #define IMX_FEC_BASE ENET_IPS_BASE_ADDR | |
32 | ||
33 | /* MMC Config */ | |
34 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 | |
35 | ||
36 | #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ | |
37 | #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 | |
38 | ||
39 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
40 | "script=boot.scr\0" \ | |
41 | "image=zImage\0" \ | |
42 | "console=ttymxc4\0" \ | |
43 | "fdt_high=0xffffffff\0" \ | |
44 | "initrd_high=0xffffffff\0" \ | |
45 | "fdt_file=imx7d-pico.dtb\0" \ | |
46 | "fdt_addr=0x83000000\0" \ | |
47 | "ip_dyn=yes\0" \ | |
48 | "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ | |
49 | "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ | |
50 | "finduuid=part uuid mmc 0:2 uuid\0" \ | |
51 | "mmcargs=setenv bootargs console=${console},${baudrate} " \ | |
52 | "root=PARTUUID=${uuid} rootwait rw\0" \ | |
53 | "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ | |
54 | "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ | |
55 | "mmcboot=echo Booting from mmc ...; " \ | |
56 | "run finduuid; " \ | |
57 | "run mmcargs; " \ | |
58 | "if run loadfdt; then " \ | |
59 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
60 | "else " \ | |
61 | "echo WARN: Cannot load the DT; " \ | |
62 | "fi;\0" \ | |
63 | "netargs=setenv bootargs console=${console},${baudrate} " \ | |
64 | "root=/dev/nfs " \ | |
65 | "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ | |
66 | "netboot=echo Booting from net ...; " \ | |
67 | "run netargs; " \ | |
68 | "if test ${ip_dyn} = yes; then " \ | |
69 | "setenv get_cmd dhcp; " \ | |
70 | "else " \ | |
71 | "setenv get_cmd tftp; " \ | |
72 | "fi; " \ | |
73 | "${get_cmd} ${image}; " \ | |
74 | "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ | |
75 | "bootz ${loadaddr} - ${fdt_addr}; " \ | |
76 | "else " \ | |
77 | "echo WARN: Cannot load the DT; " \ | |
78 | "fi;\0" | |
79 | ||
80 | #define CONFIG_BOOTCOMMAND \ | |
81 | "if mmc rescan; then " \ | |
82 | "if run loadimage; then " \ | |
83 | "run mmcboot; " \ | |
84 | "else run netboot; " \ | |
85 | "fi; " \ | |
86 | "else run netboot; fi" | |
87 | ||
88 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
89 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) | |
90 | ||
91 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
92 | #define CONFIG_SYS_HZ 1000 | |
93 | ||
94 | /* Physical Memory Map */ | |
95 | #define CONFIG_NR_DRAM_BANKS 1 | |
96 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR | |
97 | ||
98 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM | |
99 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR | |
100 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE | |
101 | ||
102 | #define CONFIG_SYS_INIT_SP_OFFSET \ | |
103 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) | |
104 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
105 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) | |
106 | ||
107 | /* I2C configs */ | |
108 | #define CONFIG_SYS_I2C | |
109 | #define CONFIG_SYS_I2C_MXC | |
110 | #define CONFIG_SYS_I2C_MXC_I2C1 | |
111 | #define CONFIG_SYS_I2C_MXC_I2C2 | |
112 | #define CONFIG_SYS_I2C_MXC_I2C3 | |
113 | #define CONFIG_SYS_I2C_MXC_I2C4 | |
114 | #define CONFIG_SYS_I2C_SPEED 100000 | |
115 | ||
116 | /* PMIC */ | |
117 | #define CONFIG_POWER | |
118 | #define CONFIG_POWER_I2C | |
119 | #define CONFIG_POWER_PFUZE3000 | |
120 | #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08 | |
121 | ||
122 | /* FLASH and environment organization */ | |
123 | #define CONFIG_ENV_SIZE SZ_8K | |
1541d7a6 VM |
124 | |
125 | #define CONFIG_ENV_OFFSET (8 * SZ_64K) | |
126 | #define CONFIG_SYS_FSL_USDHC_NUM 2 | |
127 | ||
128 | #define CONFIG_SYS_MMC_ENV_DEV 0 | |
129 | #define CONFIG_SYS_MMC_ENV_PART 0 | |
130 | ||
131 | /* USB Configs */ | |
132 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET | |
133 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) | |
134 | #define CONFIG_MXC_USB_FLAGS 0 | |
135 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
136 | ||
137 | #define CONFIG_IMX_THERMAL | |
138 | ||
139 | #define CONFIG_USB_FUNCTION_MASS_STORAGE | |
140 | ||
141 | #endif |