[people/ms/u-boot.git] / include / configs / picosam9g45.h

/*
 * Configuration settings for the mini-box PICOSAM9G45 board.
 * (C) Copyright 2015 Inter Act B.V.
 *
 * Based on:
 * U-Boot file: include/configs/at91sam9m10g45ek.h
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x23f00000

#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK      32768
#define CONFIG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */

#define CONFIG_PICOSAM

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs	*/
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO
#define CONFIG_AT91_GPIO_PULLUP	1	/* keep pullups on peripheral pins */

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define	CONFIG_USART_ID			ATMEL_ID_SYS

/* LCD */
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONFIG_ATMEL_LCD
#define CONFIG_ATMEL_LCD_RGB565
/* board specific(not enough SRAM) */
#define CONFIG_AT91SAM9G45_LCD_BASE		0x23E00000

/* LED */
#define CONFIG_AT91_LED
#define CONFIG_GREEN_LED	AT91_PIN_PD31	/* this is the user1 led */


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/* Enable the watchdog */
#define CONFIG_AT91SAM9_WATCHDOG
#define CONFIG_HW_WATCHDOG

/*
 * Command line configuration.
 */

/* No NOR flash */
#define CONFIG_SYS_NO_FLASH

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS	2
#define PHYS_SDRAM_1		ATMEL_BASE_CS1	/* on DDRSDRC1 */
#define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
#define PHYS_SDRAM_2		ATMEL_BASE_CS6	/* on DDRSDRC0 */
#define PHYS_SDRAM_2_SIZE       0x08000000	/* 128 MB */
#define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* MMC */

#ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#endif

#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
#define CONFIG_DOS_PARTITION
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_RESET_PHY_R
#define CONFIG_AT91_WANTS_COMMON_PHY

/* USB */
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2

#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x23e00000

#ifdef CONFIG_SYS_USE_MMC
/* bootstrap + u-boot + env + linux in mmc */
#define FAT_ENV_INTERFACE	"mmc"
/*
 * We don't specify the part number, if device 0 has partition table, it means
 * the first partition; it no partition table, then take whole device as a
 * FAT file system.
 */
#define FAT_ENV_DEVICE_AND_PART	"0"
#define FAT_ENV_FILE		"uboot.env"
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
#define CONFIG_ENV_SIZE		0x4000

#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mmcblk0p2 rw rootwait"
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 dtb; " \
				"fatload mmc 0:1 0x22000000 zImage; " \
				"bootz 0x22000000 - 0x21000000"
#endif

#define CONFIG_BAUDRATE			115200

#define CONFIG_SYS_CBSIZE	256
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE  \
					+ sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x010000
#define CONFIG_SPL_STACK		0x310000

#define CONFIG_SYS_MONITOR_LEN		0x80000

#ifdef CONFIG_SYS_USE_MMC

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x00080000

#define CONFIG_SPL_LDSCRIPT	arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"

#define CONFIG_SPL_ATMEL_SIZE
#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20c73f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#endif
#endif
Commit	Line	Data
bfc37f3c EL	1	/*
	2	* Configuration settings for the mini-box PICOSAM9G45 board.
	3	* (C) Copyright 2015 Inter Act B.V.
	4	*
	5	* Based on:
	6	* U-Boot file: include/configs/at91sam9m10g45ek.h
	7	* (C) Copyright 2007-2008
	8	* Stelian Pop <stelian@popies.net>
	9	* Lead Tech Design <www.leadtechdesign.com>
	10	*
	11	* SPDX-License-Identifier: GPL-2.0+
	12	*/
	13
	14	#ifndef __CONFIG_H
	15	#define __CONFIG_H
	16
	17	#include <asm/hardware.h>
	18
	19	#define CONFIG_SYS_TEXT_BASE 0x23f00000
	20
	21	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	22
	23	/* ARM asynchronous clock */
	24	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	25	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
	26
	27	#define CONFIG_PICOSAM
	28
	29	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	30	#define CONFIG_SETUP_MEMORY_TAGS
	31	#define CONFIG_INITRD_TAG
	32	#define CONFIG_SKIP_LOWLEVEL_INIT
bfc37f3c	33
bfc37f3c EL	34	/* general purpose I/O */
	35	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	36	#define CONFIG_AT91_GPIO
	37	#define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
	38
	39	/* serial console */
	40	#define CONFIG_ATMEL_USART
	41	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	42	#define CONFIG_USART_ID ATMEL_ID_SYS
	43
	44	/* LCD */
bfc37f3c EL	45	#define LCD_BPP LCD_COLOR8
	46	#define CONFIG_LCD_LOGO
	47	#undef LCD_TEST_PATTERN
	48	#define CONFIG_LCD_INFO
	49	#define CONFIG_LCD_INFO_BELOW_LOGO
	50	#define CONFIG_SYS_WHITE_ON_BLACK
	51	#define CONFIG_ATMEL_LCD
	52	#define CONFIG_ATMEL_LCD_RGB565
bfc37f3c EL	53	/* board specific(not enough SRAM) */
	54	#define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000
	55
	56	/* LED */
	57	#define CONFIG_AT91_LED
	58	#define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */
	59
bfc37f3c EL	60
	61	/*
	62	* BOOTP options
	63	*/
	64	#define CONFIG_BOOTP_BOOTFILESIZE
	65	#define CONFIG_BOOTP_BOOTPATH
	66	#define CONFIG_BOOTP_GATEWAY
	67	#define CONFIG_BOOTP_HOSTNAME
	68
	69	/* Enable the watchdog */
	70	#define CONFIG_AT91SAM9_WATCHDOG
	71	#define CONFIG_HW_WATCHDOG
	72
	73	/*
	74	* Command line configuration.
	75	*/
	76
	77	/* No NOR flash */
	78	#define CONFIG_SYS_NO_FLASH
bfc37f3c EL	79
	80	/* SDRAM */
	81	#define CONFIG_NR_DRAM_BANKS 2
	82	#define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */
	83	#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
	84	#define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */
	85	#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
	86	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	87
	88	#define CONFIG_SYS_INIT_SP_ADDR \
	89	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	90
	91	/* MMC */
bfc37f3c EL	92
bfc37f3c EL	93	#ifdef CONFIG_CMD_MMC
bfc37f3c EL	94	#define CONFIG_GENERIC_MMC
	95	#define CONFIG_GENERIC_ATMEL_MCI
	96	#endif
	97
	98	#if defined(CONFIG_CMD_USB) \|\| defined(CONFIG_CMD_MMC)
bfc37f3c EL	99	#define CONFIG_DOS_PARTITION
	100	#endif
	101
	102	/* Ethernet */
	103	#define CONFIG_MACB
	104	#define CONFIG_RMII
	105	#define CONFIG_NET_RETRY_COUNT 20
	106	#define CONFIG_RESET_PHY_R
	107	#define CONFIG_AT91_WANTS_COMMON_PHY
	108
	109	/* USB */
	110	#define CONFIG_USB_EHCI
	111	#define CONFIG_USB_EHCI_ATMEL
	112	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
bfc37f3c EL	113
	114	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	115
	116	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	117	#define CONFIG_SYS_MEMTEST_END 0x23e00000
	118
	119	#ifdef CONFIG_SYS_USE_MMC
	120	/* bootstrap + u-boot + env + linux in mmc */
	121	#define FAT_ENV_INTERFACE "mmc"
	122	/*
	123	* We don't specify the part number, if device 0 has partition table, it means
	124	* the first partition; it no partition table, then take whole device as a
	125	* FAT file system.
	126	*/
	127	#define FAT_ENV_DEVICE_AND_PART "0"
	128	#define FAT_ENV_FILE "uboot.env"
	129	#define CONFIG_ENV_IS_IN_FAT
	130	#define CONFIG_FAT_WRITE
	131	#define CONFIG_ENV_SIZE 0x4000
	132
	133	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	134	"root=/dev/mmcblk0p2 rw rootwait"
	135	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
	136	"fatload mmc 0:1 0x22000000 zImage; " \
	137	"bootz 0x22000000 - 0x21000000"
	138	#endif
	139
	140	#define CONFIG_BAUDRATE 115200
	141
bfc37f3c EL	142	#define CONFIG_SYS_CBSIZE 256
	143	#define CONFIG_SYS_MAXARGS 16
	144	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
	145	+ sizeof(CONFIG_SYS_PROMPT) + 16)
	146	#define CONFIG_SYS_LONGHELP
	147	#define CONFIG_CMDLINE_EDITING
	148	#define CONFIG_AUTO_COMPLETE
bfc37f3c EL	149
	150	/*
	151	* Size of malloc() pool
	152	*/
	153	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
	154
	155	/* Defines for SPL */
	156	#define CONFIG_SPL_FRAMEWORK
	157	#define CONFIG_SPL_TEXT_BASE 0x300000
	158	#define CONFIG_SPL_MAX_SIZE 0x010000
	159	#define CONFIG_SPL_STACK 0x310000
	160
bfc37f3c EL	161	#define CONFIG_SYS_MONITOR_LEN 0x80000
	162
	163	#ifdef CONFIG_SYS_USE_MMC
	164
	165	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	166	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000
	167	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	168	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000
	169
	170	#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
bfc37f3c EL	171	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
bfc37f3c EL	172	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
bfc37f3c EL	173
	174	#define CONFIG_SPL_ATMEL_SIZE
	175	#define CONFIG_SYS_MASTER_CLOCK 132096000
	176	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
	177	#define CONFIG_SYS_MCKR 0x1301
	178	#define CONFIG_SYS_MCKR_CSS 0x1302
	179
	180	#endif
	181	#endif