[people/ms/u-boot.git] / include / configs / r0p7734.h

/*
 * Configuation settings for the Renesas Solutions r0p7734 board
 *
 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __R0P7734_H
#define __R0P7734_H

#define CONFIG_CPU_SH7734	1
#define CONFIG_R0P7734		1
#define CONFIG_400MHZ_MODE	1
/* #define CONFIG_533MHZ_MODE	1 */

#define CONFIG_SYS_TEXT_BASE 0x8FFC0000

#define CONFIG_CMD_SDRAM

#define CONFIG_BOOTARGS		"console=ttySC3,115200"

#define CONFIG_DISPLAY_BOARDINFO
#undef  CONFIG_SHOW_BOOT_PROGRESS

/* Ether */
#define CONFIG_SH_ETHER 1
#define CONFIG_SH_ETHER_USE_PORT (0)
#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC 1
#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
#ifndef CONFIG_SH_ETHER
# define CONFIG_SMC911X
# define CONFIG_SMC911X_16_BIT
# define CONFIG_SMC911X_BASE (0x84000000)
#endif

/* undef to save memory	*/
#define CONFIG_SYS_LONGHELP
/* Monitor Command Prompt */
/* Buffer size for input from the Console */
#define CONFIG_SYS_CBSIZE		256
/* Buffer size for Console output */
#define CONFIG_SYS_PBSIZE		256
/* max args accepted for monitor commands */
#define CONFIG_SYS_MAXARGS		16
/* Buffer size for Boot Arguments passed to kernel */
#define CONFIG_SYS_BARGSIZE	512
/* List of legal baudrate settings for this board */
#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }

/* SCIF */
#define CONFIG_SCIF_CONSOLE	1
#define CONFIG_SCIF			1
#define CONFIG_CONS_SCIF3	1

/* Suppress display of console information at boot */

/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE	(0x88000000)
#define CONFIG_SYS_SDRAM_SIZE	(128 * 1024 * 1024)
#define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)

#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
#define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
/* Enable alternate, more extensive, memory test */
#undef  CONFIG_SYS_ALT_MEMTEST
/* Scratch address used by the alternate memory test */
#undef  CONFIG_SYS_MEMTEST_SCRATCH

/* Enable temporary baudrate change while serial download */
#undef  CONFIG_SYS_LOADS_BAUD_CHANGE

/* FLASH */
#define CONFIG_FLASH_CFI_DRIVER 1
#define CONFIG_SYS_FLASH_CFI
#undef  CONFIG_SYS_FLASH_QUIET_TEST
#define CONFIG_SYS_FLASH_EMPTY_INFO
#define CONFIG_SYS_FLASH_BASE	(0xA0000000)
#define CONFIG_SYS_MAX_FLASH_SECT	512

/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
#define CONFIG_SYS_MAX_FLASH_BANKS	1
#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }

/* Timeout for Flash erase operations (in ms) */
#define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
/* Timeout for Flash write operations (in ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
/* Timeout for Flash set sector lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
/* Timeout for Flash clear lock bit operations (in ms) */
#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)

/*
 * Use hardware flash sectors protection instead
 * of U-Boot software protection
 */
#undef  CONFIG_SYS_FLASH_PROTECTION
#undef  CONFIG_SYS_DIRECT_FLASH_TFTP

/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
/* Monitor size */
#define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
/* Size of DRAM reserved for malloc() use */
#define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
#define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)

/* ENV setting */
#define CONFIG_ENV_OVERWRITE	1
#define CONFIG_ENV_SECT_SIZE	(128 * 1024)
#define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
#define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
#define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)

/* Board Clock */
#if defined(CONFIG_400MHZ_MODE)
#define CONFIG_SYS_CLK_FREQ 50000000
#else
#define CONFIG_SYS_CLK_FREQ 44444444
#endif
#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
#define CONFIG_SYS_TMU_CLK_DIV      4

#endif	/* __R0P7734_H */
Commit	Line	Data
8ca805e1 NI	1	/*
	2	* Configuation settings for the Renesas Solutions r0p7734 board
	3	*
	4	* Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
8ca805e1 NI	7	*/
	8
	9	#ifndef __R0P7734_H
	10	#define __R0P7734_H
	11
8ca805e1 NI	12	#define CONFIG_CPU_SH7734 1
	13	#define CONFIG_R0P7734 1
	14	#define CONFIG_400MHZ_MODE 1
	15	/* #define CONFIG_533MHZ_MODE 1 */
	16
	17	#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
	18
8ca805e1	19	#define CONFIG_CMD_SDRAM
8ca805e1	20
8ca805e1 NI	21	#define CONFIG_BOOTARGS "console=ttySC3,115200"
8ca805e1 NI	22
18a40e84	23	#define CONFIG_DISPLAY_BOARDINFO
8ca805e1 NI	24	#undef CONFIG_SHOW_BOOT_PROGRESS
	25
	26	/* Ether */
	27	#define CONFIG_SH_ETHER 1
	28	#define CONFIG_SH_ETHER_USE_PORT (0)
	29	#define CONFIG_SH_ETHER_PHY_ADDR (0x0)
	30	#define CONFIG_PHYLIB
	31	#define CONFIG_PHY_SMSC 1
	32	#define CONFIG_BITBANGMII
	33	#define CONFIG_BITBANGMII_MULTI
a80a6619 NI	34	#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */
a80a6619 NI	35	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
8ca805e1 NI	36	#ifndef CONFIG_SH_ETHER
	37	# define CONFIG_SMC911X
	38	# define CONFIG_SMC911X_16_BIT
	39	# define CONFIG_SMC911X_BASE (0x84000000)
	40	#endif
	41
	42	/* undef to save memory */
	43	#define CONFIG_SYS_LONGHELP
	44	/* Monitor Command Prompt */
8ca805e1 NI	45	/* Buffer size for input from the Console */
	46	#define CONFIG_SYS_CBSIZE 256
	47	/* Buffer size for Console output */
	48	#define CONFIG_SYS_PBSIZE 256
	49	/* max args accepted for monitor commands */
	50	#define CONFIG_SYS_MAXARGS 16
	51	/* Buffer size for Boot Arguments passed to kernel */
	52	#define CONFIG_SYS_BARGSIZE 512
	53	/* List of legal baudrate settings for this board */
	54	#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
	55
	56	/* SCIF */
	57	#define CONFIG_SCIF_CONSOLE 1
	58	#define CONFIG_SCIF 1
	59	#define CONFIG_CONS_SCIF3 1
	60
	61	/* Suppress display of console information at boot */
8ca805e1 NI	62
	63	/* SDRAM */
	64	#define CONFIG_SYS_SDRAM_BASE (0x88000000)
	65	#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
	66	#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
	67
	68	#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
	69	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024)
	70	/* Enable alternate, more extensive, memory test */
	71	#undef CONFIG_SYS_ALT_MEMTEST
	72	/* Scratch address used by the alternate memory test */
	73	#undef CONFIG_SYS_MEMTEST_SCRATCH
	74
	75	/* Enable temporary baudrate change while serial download */
	76	#undef CONFIG_SYS_LOADS_BAUD_CHANGE
	77
	78	/* FLASH */
	79	#define CONFIG_FLASH_CFI_DRIVER 1
	80	#define CONFIG_SYS_FLASH_CFI
	81	#undef CONFIG_SYS_FLASH_QUIET_TEST
	82	#define CONFIG_SYS_FLASH_EMPTY_INFO
	83	#define CONFIG_SYS_FLASH_BASE (0xA0000000)
	84	#define CONFIG_SYS_MAX_FLASH_SECT 512
	85
	86	/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
	87	#define CONFIG_SYS_MAX_FLASH_BANKS 1
	88	#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
	89
	90	/* Timeout for Flash erase operations (in ms) */
	91	#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
	92	/* Timeout for Flash write operations (in ms) */
	93	#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
	94	/* Timeout for Flash set sector lock bit operations (in ms) */
	95	#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
	96	/* Timeout for Flash clear lock bit operations (in ms) */
	97	#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
	98
	99	/*
	100	* Use hardware flash sectors protection instead
	101	* of U-Boot software protection
	102	*/
	103	#undef CONFIG_SYS_FLASH_PROTECTION
	104	#undef CONFIG_SYS_DIRECT_FLASH_TFTP
	105
	106	/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
	107	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
	108	/* Monitor size */
	109	#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
	110	/* Size of DRAM reserved for malloc() use */
	111	#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
8ca805e1 NI	112	#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
	113
	114	/* ENV setting */
8ca805e1 NI	115	#define CONFIG_ENV_OVERWRITE 1
	116	#define CONFIG_ENV_SECT_SIZE (128 * 1024)
	117	#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
	118	#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
	119	/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
	120	#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
	121	#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
	122
	123	/* Board Clock */
	124	#if defined(CONFIG_400MHZ_MODE)
	125	#define CONFIG_SYS_CLK_FREQ 50000000
	126	#else
	127	#define CONFIG_SYS_CLK_FREQ 44444444
	128	#endif
684a501e NI	129	#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
684a501e NI	130	#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
8ca805e1	131	#define CONFIG_SYS_TMU_CLK_DIV 4
8ca805e1 NI	132
8ca805e1 NI	133	#endif /* __R0P7734_H */