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net: Move the CMD_NET config to defconfigs
[people/ms/u-boot.git] / include / configs / r7780mp.h
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1/*
2 * Configuation settings for the Renesas R7780MP board
3 *
ec39d479 4 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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5 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
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8 */
9
10#ifndef __R7780RP_H
11#define __R7780RP_H
12
13#undef DEBUG
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14#define CONFIG_CPU_SH7780 1
15#define CONFIG_R7780MP 1
6d0f6bcf 16#define CONFIG_SYS_R7780MP_OLD_FLASH 1
ec39d479 17#define __LITTLE_ENDIAN__ 1
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18
19/*
20 * Command line configuration.
21 */
22#define CONFIG_CMD_SDRAM
23#define CONFIG_CMD_FLASH
24#define CONFIG_CMD_MEMORY
25#define CONFIG_CMD_PCI
c133c1fb 26#define CONFIG_CMD_PING
bdab39d3 27#define CONFIG_CMD_SAVEENV
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28#define CONFIG_CMD_NFS
29#define CONFIG_CMD_IDE
30#define CONFIG_CMD_EXT2
31#define CONFIG_DOS_PARTITION
32
6c58a030 33#define CONFIG_SCIF_CONSOLE 1
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34#define CONFIG_BAUDRATE 115200
35#define CONFIG_CONS_SCIF0 1
36
37#define CONFIG_BOOTDELAY 3
38#define CONFIG_BOOTARGS "console=ttySC0,115200"
39#define CONFIG_ENV_OVERWRITE 1
40
41/* check for keypress on bootdelay==0 */
42/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
43
913c8910 44#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
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45#define CONFIG_SYS_SDRAM_BASE (0x08000000)
46#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
c133c1fb 47
6d0f6bcf 48#define CONFIG_SYS_LONGHELP
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49#define CONFIG_SYS_CBSIZE 256
50#define CONFIG_SYS_PBSIZE 256
51#define CONFIG_SYS_MAXARGS 16
52#define CONFIG_SYS_BARGSIZE 512
c133c1fb 53
6d0f6bcf 54#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
14d0a02a 55#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
c133c1fb 56
ec39d479 57/* Flash board support */
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58#define CONFIG_SYS_FLASH_BASE (0xA0000000)
59#ifdef CONFIG_SYS_R7780MP_OLD_FLASH
ec39d479 60/* NOR Flash (S29PL127J60TFI130) */
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61# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
62# define CONFIG_SYS_MAX_FLASH_BANKS (2)
63# define CONFIG_SYS_MAX_FLASH_SECT 270
64# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
65 CONFIG_SYS_FLASH_BASE + 0x100000,\
66 CONFIG_SYS_FLASH_BASE + 0x400000,\
67 CONFIG_SYS_FLASH_BASE + 0x700000, }
68#else /* CONFIG_SYS_R7780MP_OLD_FLASH */
ec39d479 69/* NOR Flash (Spantion S29GL256P) */
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70# define CONFIG_SYS_MAX_FLASH_BANKS (1)
71# define CONFIG_SYS_MAX_FLASH_SECT 256
72# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
73#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
c133c1fb 74
6d0f6bcf 75#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
c133c1fb 76/* Address of u-boot image in Flash */
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77#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
78#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
c133c1fb 79/* Size of DRAM reserved for malloc() use */
6d0f6bcf 80#define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
c133c1fb 81
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82#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
83#define CONFIG_SYS_RX_ETH_BUFFER (8)
c133c1fb 84
6d0f6bcf 85#define CONFIG_SYS_FLASH_CFI
00b1883a 86#define CONFIG_FLASH_CFI_DRIVER
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87#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
88#undef CONFIG_SYS_FLASH_QUIET_TEST
c133c1fb 89/* print 'E' for empty sector on flinfo */
6d0f6bcf 90#define CONFIG_SYS_FLASH_EMPTY_INFO
c133c1fb 91
5a1aceb0 92#define CONFIG_ENV_IS_IN_FLASH
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93#define CONFIG_ENV_SECT_SIZE (256 * 1024)
94#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
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95#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
96#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
97#define CONFIG_SYS_FLASH_WRITE_TOUT 500
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98
99/* Board Clock */
100#define CONFIG_SYS_CLK_FREQ 33333333
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101#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
102#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
be45c632 103#define CONFIG_SYS_TMU_CLK_DIV 4
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104
105/* PCI Controller */
106#if defined(CONFIG_CMD_PCI)
107#define CONFIG_PCI
108#define CONFIG_SH4_PCI
ab8f4d40 109#define CONFIG_SH7780_PCI
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110#define CONFIG_SH7780_PCI_LSR 0x07f00001
111#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
112#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
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113#define CONFIG_PCI_PNP
114#define CONFIG_PCI_SCAN_SHOW 1
115#define __io
116#define __mem_pci
117
118#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
119#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
120#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
121
122#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
123#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
124#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
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125#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
126#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
127#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
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128#endif /* CONFIG_CMD_PCI */
129
130#if defined(CONFIG_CMD_NET)
ec39d479 131/*
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132#define CONFIG_RTL8169
133*/
c7c1dbbf 134/* AX88796L Support(NE2000 base chip) */
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135#define CONFIG_DRIVER_AX88796L
136#define CONFIG_DRIVER_NE2000_BASE 0xA4100000
137#endif
138
139/* Compact flash Support */
140#if defined(CONFIG_CMD_IDE)
141#define CONFIG_IDE_RESET 1
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142#define CONFIG_SYS_PIO_MODE 1
143#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
144#define CONFIG_SYS_IDE_MAXDEVICE 1
145#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
146#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
147#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
148#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
149#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
f2a37fcd 150#define CONFIG_IDE_SWAP_IO
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151#endif /* CONFIG_CMD_IDE */
152
153#endif /* __R7780RP_H */