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e525d34b NI |
1 | /* |
2 | * include/configs/rcar-gen3-common.h | |
3 | * This file is R-Car Gen3 common configuration file. | |
4 | * | |
2dea3b3e | 5 | * Copyright (C) 2015-2017 Renesas Electronics Corporation |
e525d34b NI |
6 | * |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #ifndef __RCAR_GEN3_COMMON_H | |
11 | #define __RCAR_GEN3_COMMON_H | |
12 | ||
13 | #include <asm/arch/rmobile.h> | |
14 | ||
e525d34b NI |
15 | #define CONFIG_CMD_EXT2 |
16 | #define CONFIG_CMD_EXT4 | |
17 | #define CONFIG_CMD_EXT4_WRITE | |
18 | ||
19 | #define CONFIG_REMAKE_ELF | |
20 | ||
21 | /* boot option */ | |
22 | #define CONFIG_SUPPORT_RAW_INITRD | |
23 | ||
24 | /* Support File sytems */ | |
e525d34b NI |
25 | #define CONFIG_SUPPORT_VFAT |
26 | #define CONFIG_FS_EXT4 | |
27 | #define CONFIG_EXT4_WRITE | |
28 | ||
29 | #define CONFIG_CMDLINE_TAG | |
30 | #define CONFIG_SETUP_MEMORY_TAGS | |
31 | #define CONFIG_INITRD_TAG | |
32 | #define CONFIG_CMDLINE_EDITING | |
e525d34b | 33 | |
e525d34b NI |
34 | #undef CONFIG_SHOW_BOOT_PROGRESS |
35 | ||
36 | #define CONFIG_ARCH_CPU_INIT | |
e525d34b NI |
37 | |
38 | #define CONFIG_SH_GPIO_PFC | |
39 | ||
40 | /* console */ | |
48aa8126 MV |
41 | #define CONFIG_SYS_CBSIZE 2048 |
42 | #define CONFIG_SYS_PBSIZE \ | |
43 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
44 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
e525d34b | 45 | #define CONFIG_SYS_LONGHELP |
48aa8126 | 46 | #define CONFIG_SYS_MAXARGS 64 |
e525d34b NI |
47 | #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } |
48 | ||
49 | /* MEMORY */ | |
43c8352e | 50 | #define CONFIG_SYS_TEXT_BASE 0x50000000 |
e525d34b NI |
51 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7fff0) |
52 | ||
2dea3b3e MV |
53 | #define DRAM_RSV_SIZE 0x08000000 |
54 | #if defined(CONFIG_R8A7795) | |
55 | #define CONFIG_NR_DRAM_BANKS 4 | |
56 | #define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) | |
57 | #define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE) | |
58 | #define PHYS_SDRAM_2 0x500000000 | |
59 | #define PHYS_SDRAM_2_SIZE 0x40000000u | |
60 | #define PHYS_SDRAM_3 0x600000000 | |
61 | #define PHYS_SDRAM_3_SIZE 0x40000000u | |
62 | #define PHYS_SDRAM_4 0x700000000 | |
63 | #define PHYS_SDRAM_4_SIZE 0x40000000u | |
64 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
65 | #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE | |
66 | #elif defined(CONFIG_R8A7796) | |
67 | #define CONFIG_NR_DRAM_BANKS 2 | |
68 | #define PHYS_SDRAM_1 (0x40000000 + DRAM_RSV_SIZE) | |
69 | #define PHYS_SDRAM_1_SIZE (0x80000000u - DRAM_RSV_SIZE) | |
70 | #define PHYS_SDRAM_2 0x0600000000 | |
71 | #define PHYS_SDRAM_2_SIZE 0x80000000u | |
72 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 | |
73 | #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE | |
74 | #endif | |
75 | #define CONFIG_SYS_LOAD_ADDR 0x48080000 | |
76 | #define CONFIG_VERY_BIG_RAM | |
77 | #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_SDRAM_SIZE | |
e525d34b NI |
78 | |
79 | #define CONFIG_SYS_MONITOR_BASE 0x00000000 | |
80 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) | |
81 | #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) | |
82 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) | |
83 | ||
84 | /* ENV setting */ | |
85 | #define CONFIG_ENV_OVERWRITE | |
86 | #define CONFIG_ENV_SECT_SIZE (128 * 1024) | |
87 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) | |
88 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
89 | ||
90 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
91 | "fdt_high=0xffffffffffffffff\0" \ | |
92 | "initrd_high=0xffffffffffffffff\0" | |
93 | ||
e525d34b NI |
94 | #define CONFIG_BOOTCOMMAND \ |
95 | "tftp 0x48080000 Image; " \ | |
f7fda5d1 | 96 | "tftp 0x48000000 Image-"CONFIG_DEFAULT_FDT_FILE"; " \ |
e525d34b NI |
97 | "booti 0x48080000 - 0x48000000" |
98 | ||
99 | #endif /* __RCAR_GEN3_COMMON_H */ |